Method for adjusting frequency and phases of clock

Abstract

The invention discloses a method for adjusting the frequency and the phases of a clock. The method comprises the steps that: an upper computer edits a waveform, frequency and phase command set for FPGA output according to the need, and then sends a related operation command to an FPGA processor through a serial port; the FPGA processor analyzes the command after receiving the response of the upper computer; the response of a test chip is waited; and after a response signal is received, the FPGA processor is informed of the related signal, and a test is performed. Compared with conventional methods, the method needs quite smaller NMOS and PMOS areas to achieve a same ESD level. In this way, the circuit area is reduced by reuse of an ESD protector and a driving tube. When the method is used for testing the chip, the frequency and the phases of the clock can be adjusted according to the need, so that the chip test is performed quickly and accurately; the method is only achieved by controlling the flow, the automated test can be performed, the test cost of the chip can be greatly reduced, and test equipment is small in occupied space.

Description

technical field [0001] The invention belongs to the technical field of chip testing, in particular to a clock frequency adjustment method. Background technique [0002] In the circuit system, whether it is a supercomputer used in national defense or an analog-to-digital conversion chip as small as a fingernail, it is inseparable from the clock system, whether it is a quartz crystal oscillator, a temperature compensated oscillator or a voltage controlled crystal oscillator. Wait, under different temperature, humidity, electromagnetic interference and other factors, it is impossible to keep the frequency and phase of the output clock strictly unchanged, and the circuit system in practical applications needs to be able to work stably in various environments. At this time, in the laboratory In the middle, it is necessary to verify the clock redundancy of the circuit system. A huge system is usually built by countless chips. Source oscilloscopes, some also support programmable c...

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Problems solved by technology

[0002] In the circuit system, whether it is a supercomputer used in national defense or an analog-to-digital conversion chip as small as a fingernail, it is inseparable from the clock system, whether it is a quartz crystal oscillator, a temperature compensated oscillator or a voltage controlled crystal oscillator. Wait, under different temperature, humidity, electromagnetic interference and other factors, it is impossible to keep the frequency and phase of the output clock strictly unchanged, and the circuit system in practical applications needs to be able to work stably in various environments. At this time, in the laboratory In the middle, it is necessary to verify the clock redundancy of the circuit system. A huge system is usually built by countless chips. Source oscilloscopes, some also support programmable control, but oscilloscopes that not only support programmable control, but also have a bandwidth above 100MHZ are usually expensive, ranging from four to five million yuan, or more than 10,000 yuan, which is expensive

[0003] In addition, there are some simple signal generators on the market. For example, a 555 oscillator is used to build a circuit to generate a sine signal, and then the sine signal is transformed into a square wave signal through a shaping circuit, and then the square wave signal is transformed into a triangle wave. This can also generate Sine wave, square wave and triangular wave signals of specific frequency can also generate simple signal sources through the combination of single-chip integrated chip IC8038 or single-chip microcomputer and AD converter, but the simple signal sources generated by these implementation methods either have small bandwidth or cannot phase modulation

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