Preparation method of heterojunction SiGe-based pin diode for reconfigurable multi-layer holographic antenna
A holographic antenna and diode technology, used in antennas, loop antennas, antenna parts and other directions, can solve the problems of low carrier mobility, large injection dose and energy, and low integration, and achieve high carrier mobility. , improve the breakdown voltage, improve the effect of device performance
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Embodiment 1
[0058] An embodiment of the present invention provides a method for preparing a heterogeneous SiGe-based pin diode for a reconfigurable multilayer holographic antenna. The heterogeneous SiGe-based plasmonic pin diode is used to manufacture a reconfigurable multilayer holographic antenna (1). See figure 1 , figure 1 A schematic structural diagram of a reconfigurable multi-layer holographic antenna provided by an embodiment of the present invention. The holographic antenna (1) comprises: a semiconductor substrate (11), an antenna module (13), a first holographic ring (15) and a second holographic ring (17); the antenna module (13), the Both the first holographic ring (15) and the second holographic ring (17) are fabricated on the semiconductor substrate (11) by semiconductor technology; wherein, the antenna module (13), the first holographic Both the ring (15) and the second holographic ring (17) include pin diode strings connected in series;
[0059] Please refer to figure...
Embodiment 2
[0107] See Figure 8a-Figure 8r , Figure 8a-Figure 8r A schematic diagram of another method for preparing a heterogeneous SiGe-based pin diode for a reconfigurable multilayer holographic antenna provided by the embodiment of the present invention. On the basis of the first embodiment above, to prepare a channel length of 22 nm (solid-state plasma region A solid-state plasma pin diode with a length of 100 microns) is taken as an example for detailed description, and the specific steps are as follows:
[0108] Step 1, substrate material preparation steps:
[0109] (1a) if Figure 8a As shown, the SiGeOI substrate 101 with (100) orientation is selected, the doping type is p-type, and the doping concentration is 10 14 cm -3 , the thickness of the top layer SiGe is 50 μm;
[0110] (1b) if Figure 8b As shown, the method of chemical vapor deposition (Chemical vapor deposition, referred to as CVD) is used to deposit a layer of first SiO with a thickness of 40 nm on the SiGe la...
Embodiment 3
[0138] Please refer to Figure 9 , Figure 9 A device structure diagram of another heterogeneous SiGe-based plasmonic pin diode provided by an embodiment of the present invention. The heterogeneous SiGe-based plasmonic pin diode employs the above-mentioned as figure 2 The preparation method shown is made, specifically, the SiGe-based plasma pin diode is prepared and formed on the SiGeOI substrate 301, and the P region 304, the N region 305 of the pin diode and the lateral direction are located between the P region 304 and the N region 305 The I-regions between them are located in the top layer SiGe302 of the substrate. Wherein, the pin diode can be isolated by STI deep trenches, that is, an isolation trench 303 is provided outside the P region 304 and the N region 305, and the depth of the isolation trench 303 is greater than or equal to the thickness of the top SiGe layer.
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