A method for fabricate a novel trap structure for a single crystal silicon solar cell
A technology of solar cells and light trapping structure, applied in circuits, photovoltaic power generation, electrical components, etc., can solve the problems of high cost of rare and precious metals, reduced battery efficiency and service life, battery ion recombination and PID, etc., to improve light absorption income , Simplified production process, uniform shape effect
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Embodiment 1
[0043] RCA technology is used to clean and dry the silicon wafer. Thermal growth of 80nm thick SiO at 750°C 2 Layer, as a photolithography mask; the initial speed of uniform glue is 800r / min, and the time is 5s; 1. Developing treatment, exposure time is set to 90s, and developing time is 50s; then the developed silicon wafer is post-baked at 120°C for 10 minutes to finalize the shape; prepare HF:NH 4 The solution with a mass ratio of F of 3:10 de-SiO 2 , etch for 1.5min, and then remove the photoresist in an acetone solution. A THMA solution with a concentration of 10% was used to etch the silicon wafer for 60 minutes under the condition of a constant temperature water bath of 80° C. to obtain a micro-nano texture.
Embodiment 2
[0045] RCA technology is used to clean and dry the silicon wafer. Thermal growth of 120nm thick SiO at 800°C 2 Layer, as a photolithography mask; the initial speed of uniform glue is 900r / min, and the time is 8s; 1. Developing treatment, exposure time is set to 95s, and developing time is 70s; then the developed silicon wafer is post-baked at 125°C for 15 minutes to finalize the shape; prepare HF:NH4 A solution with a mass ratio of F of 2:5 to remove SiO 2 , etch for 2.5min, and then remove the photoresist in an acetone solution. A THMA solution with a concentration of 15% was used to etch the silicon wafer for 80 minutes under the condition of a constant temperature water bath of 85° C. to obtain a micro-nano pore texture.
Embodiment 3
[0047] RCA technology is used to clean and dry the silicon wafer. Thermal growth of 160nm thick SiO at 850°C 2 Layer, as a photolithography mask; the initial speed of uniform coating is 1000r / min, and the time is 12s; 1. Development treatment, exposure time is set to 100s, and development time is 60s; then the developed silicon wafer is post-baked at 110°C for 20 minutes to finalize the shape; prepare HF:NH 4 A solution with a mass ratio of F of 1:2 to remove SiO 2 , etch for 4min, and then remove the photoresist in acetone solution. The silicon wafer was etched with a 20% THMA solution in a constant temperature water bath at 75° C. for 120 minutes to obtain a micro-nano texture.
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