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Protective passivation layer for magnetic tunnel junctions

A technology of magnetic tunnel junction and passivation layer, which is applied in the manufacturing/processing of components of electromagnetic equipment, resistors controlled by magnetic fields, and electromagnetic devices, and can solve the problems of difficult repair, extensive side wall damage, and low resistance. corrosion characteristics etc.

Pending Publication Date: 2020-03-31
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Furthermore, the dielectric nature of the tunneling barrier layer of magnesium oxide, which is known to have low corrosion resistance properties, is significantly degraded when exposed to the atmosphere during the step of depositing the insulating dielectric layer
[0006] While sidewall damage from ion bombardment can be removed, such as exposure to the atmosphere when depositing dielectric layers, these methods are often time consuming and costly
Also, some sidewall damage may be too extensive to repair

Method used

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  • Protective passivation layer for magnetic tunnel junctions
  • Protective passivation layer for magnetic tunnel junctions
  • Protective passivation layer for magnetic tunnel junctions

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Embodiment Construction

[0034] Embodiments of the present invention are concerned with improving structural integrity in MTJ devices, particularly during deposition of dielectric layers between MTJ sidewalls and exposure to high temperatures around 400°C. MTJs can be formed in a variety of memory devices, and memory devices include, but are not limited to, MRRAM, spin torque transfer MRRAM, or other spin-on devices Such as a spin-torque oscillator. In the drawings, the layer has a thickness in the z-direction, a width in the x-direction, and a length in the y-direction. The terms "dielectric layer" and "insulating layer" are used interchangeably.

[0035] As mentioned above, many memory devices are currently incorporated into CMOS platforms to provide higher performance. However, it has been found that depositing a dielectric layer directly on the sidewalls of the MTJ by conventional methods, followed by steps required in the CMOS process, such as annealing the device at around 400°C, produces subs...

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Abstract

A magnetic device for magnetic random access memory (MRAM) technology comprises a magnetic tunnel junction (MTJ, 11a) with a sidewall (11s1) formed between a bottom electrode (10a) and a top electrode(14a). A passivation layer (12) that is a single layer or multilayer comprising one of B, C, Ge, or an alloy or compound thereof is formed on the sidewall to protect the MTJ from reactive species during subsequent processing including deposition of a dielectric layer (13) that electrically isolates the MTJ (11a) from adjacent MTJs (11b), and during annealing in CMOS fabrication. Preferably, the passivation layer is about 3 to 10 Angstroms thick, an oxide or nitride of B, C, Ge, and amorphous to prevent diffusion of reactive oxygen or nitrogen species.

Description

technical field [0001] Embodiments of the present invention relate to magnetoresistive random access memory, spin torque transfer magnetoresistive random access memory, and magnetic tunneling junctions in other electronic spin devices, and more particularly to protecting magnetic tunneling during process steps Junctions, and the process steps include depositing an insulating dielectric layer to separate adjacent magnetic tunneling junctions, and high temperature annealing at around 400°C in general CMOS fabrication. Background technique [0002] The magnetic tunneling junction is a key component of magnetoresistive random access memory, spin torque transfer magnetoresistive random access memory, and other electronic spin devices, and can be formed with tunneling barrier layers such as metal oxides A stack between two magnetic layers that provides the tunneling magnetoresistance effect. One of the magnetic layers is a free layer and serves as a sensing layer, and the magneti...

Claims

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Application Information

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IPC IPC(8): H01L43/08H01L43/12H01L27/22
CPCH10B61/00H10N50/01H10N50/10H03B15/006H10N50/80H10N50/85H01F10/329H01L21/02172H01L21/02323H01L21/02329G01R33/098G11C11/161
Inventor 裘地·玛丽·艾维塔真杰诺童儒颖
Owner TAIWAN SEMICON MFG CO LTD
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