Semiconductor device capacitor structure and manufacturing method thereof

Abstract

The invention discloses a semiconductor device capacitor structure and a manufacturing method thereof. The manufacturing method comprises the steps of sequentially forming a lower pole plate and a dielectric substance layer on a semiconductor substrate; first forming a first metal layer; then sequentially covering a first protective layer and an insulating layer; sequentially etching the insulating layer at the top of the first metal layer and the first protective layer to form a capacitor through hole; forming a second protective layer to cover the surface of the insulating layer and the inner wall of the capacitor through hole; manufacturing a second metal layer, wherein the second metal layer is in contact with the first metal layer through the capacitor through hole to form an upper pole plate. Through the arrangement of the invention, the structure of a charge concentration region in the capacitor is improved, the junction of three materials is avoided, the stress effect is reduced, the pollution of water vapor and the like in the manufacturing process and the use process is effectively isolated, the reliability is improved, and the service life of the device is prolonged. Themethod has the advantages of few process steps and low cost.

Description

technical field [0001] The invention relates to a capacitance structure, in particular to a high-reliability semiconductor device capacitance structure and a manufacturing method thereof. Background technique [0002] With the development of equipment technology, the process capability of compound semiconductors is getting higher and higher, and the ability to control the reliability of active components such as triodes is getting stronger and stronger. The short board of the subsequent passive components is revealed. Chips have higher and higher requirements for the reliability of capacitors, especially in terms of high temperature and high humidity. [0003] The capacitor structure of existing semiconductor devices usually forms the lower plate metal layer, the dielectric layer and the upper plate metal layer in sequence on the wafer that has completed the device process, and coats an organic insulating layer around it to make up for the height difference. The structure ...

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Problems solved by technology

[0003]The capacitance structure of the existing semiconductor device is usually to form the lower plate metal layer, the dielectric layer and the upper plate metal layer in sequence on the wafer that has completed the device manufacturing process , and coat its periphery with an organic insulating layer to make up for the height difference to make the entire structure flat, which will form a junction area between the inorganic compound, the metal and the organic compound between the dielectric layer, the metal layer and the insulating layer, because here is a capacitance The charge concentration area of ​​the structure, due to the interaction between different materials, has the greatest stress here, and it is easy to burn out during the chip aging test process, resulting in device reliability failure

In addition, due to the weak ability of the organic insulating material to resist water vapor, the ability of the device to block water vapor is reduced, and it is vulnerable to corrosion by water vapor and the like.

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