Semiconductor device and manufacturing method thereof

Abstract

The invention provides a semiconductor device and a manufacturing method thereof. The method comprises the steps of providing a substrate which at least comprises a pull-down region and a channel region, wherein the width of the pull-down region is equal to the width of the channel region, forming a gate oxide layer on the substrate, wherein the gate oxide layer covers the pull-down region and thechannel region, forming a polycrystalline silicon layer on the gate oxide layer, forming a patterned photoresist layer on the polycrystalline silicon layer, wherein the patterned photoresist layer exposes the polycrystalline silicon layer on the pull-down region, carrying out ion doping on the exposed polycrystalline silicon layer, and removing the patterned photoresist layer, and etching the polycrystalline silicon layer and the gate oxide layer so as to form a pull-down gate structure on the pull-down region and form a channel gate structure on the channel region. According to the manufacturing method of the semiconductor device, the performance of the semiconductor device can be improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] Static Random Access Memory (SRAM, Static Random Access Memory) is a very common embedded memory in Logic circuits. Due to its high-density mode, the yield rate of integrated circuits is largely limited by the performance of embedded memory. Currently, the most common SRAM cell is the 6T structure. [0003] The key indicator for considering the stability of 6T SRAM cells is static noise margin or static noise margin (SNM, Static Noise Margin), which is usually defined as the difference between the operating current of the pull-down transistor and the operating current of the pass transistor Ratio, in order to improve the static noise margin, the width of the active region in the pull-down transistor is usually designed to be larger than the width of the active region in the pass trans...

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Problems solved by technology

[0003] The key indicator for considering the stability of 6T SRAM cells is static noise redundancy or static noise margin (SNM, Static Noise Margin), which is usually defined as the difference between the operating current of the pull-down transistor and the operating current of the pass transistor Ratio, in order to improve the static noise margin, the width of the active region in the pull-down transistor is usually designed to be larger than the width of the active region in the pass transistor, but in the actual manufacturing process, due to the limitation of lithography and etching process capabilities, the pass transistor The shape of the active region in the middle is prone to distortion, causing a mismatch between the first pass transistor and the second pass transistor, thus resulting in reduced static noise margin, resulting in reduced performance of the SRAM

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