Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Semiconductor device and forming method thereof

A technology for semiconductors and devices, applied in the field of semiconductor devices and their formation, can solve problems such as increasing the working voltage of semiconductor devices, increasing gate resistance of semiconductor devices, and low permeability, so as to reduce interface resistance, improve uniformity, and enhance penetration. effect of ability

Active Publication Date: 2020-12-29
SHANGHAI HUALI MICROELECTRONICS CORP
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, in the process of forming semiconductor devices using the gate-first process, due to the non-uniformity and low permeability of the single-crystal silicon gate to doped boron ions, the gate resistance of the semiconductor device increases, thereby improving the performance of the semiconductor device. Operating Voltage

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Semiconductor device and forming method thereof
  • Semiconductor device and forming method thereof
  • Semiconductor device and forming method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0042] As mentioned in the background, at present, the gate process is the process method for realizing high-k metal gate in the semiconductor manufacturing process flow, and its manufacturing process flow is similar to the process adopted in the traditional poly / SiON method. The gate electrode is first formed, including a high-k dielectric film and a single-crystal silicon gate, followed by subsequent transistor manufacturing stages, such as the definition of source and drain regions, silicidation of part of the substrate surface, metallization, and so on. However, in the process of forming semiconductor devices using the gate-first process, due to the non-uniformity and low permeability of the single crystal silicon gate to doped boron ions, the gate resistance of the semiconductor device increases, thereby improving the performance of the semiconductor device. Operating Voltage.

[0043] Therefore, the present invention provides a method for forming a semiconductor device, ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a semiconductor device and a forming method thereof. According to the novel semiconductor device forming method provided by the invention, a monocrystalline silicon gate layer in a high-K metal gate CMOS device formed in the prior art is replaced with an amorphous silicon gate layer, and annealing treatment is carried out on the amorphous silicon gate layer, so that amorphous silicon in an amorphous silicon gate is recrystallized to form a polycrystalline silicon gate; the effective resistance of a gate stack layer in a CMOS device is related to the uniformity of the concentration of the doped ions in a crystalline silicon gate and the permeability of the doped ions, so that the amorphous silicon can be annealed to obtain the polycrystalline silicon with high permeability to the doped ions; and after P type or N type ions are doped in the polycrystalline silicon, a relatively more uniform doping concentration can be obtained, so that the uniformity of the dopingion concentration in the polycrystalline silicon gate layer of the gate structure in the final CMOS device and the penetration degree of doping ions are improved, and the gate resistance is further reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a forming method thereof. Background technique [0002] Semiconductor device fabrication is thus becoming increasingly challenging and pushed towards the limits of what is physically possible. So-called high-k metal gate technology has gained popularity in the fabrication of CMOS devices with typical gate dimensions below 50nm. According to the high-k metal gate manufacturing process flow, the insulating layer included in the gate electrode is composed of a high-k material. This is in contrast to the conventional oxide / polysilicon (poly / SiON) approach where the gate electrode insulating layer is usually composed of oxide, preferably silicon dioxide or oxynitride in the case of silicon-based devices. silicon. At present, the process method for realizing the high-k metal gate in the semiconductor manufacturing process flow is the gate process, a...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L21/28H01L21/3215H01L21/336H01L29/49H01L29/78
CPCH01L21/28079H01L21/32155H01L29/66568H01L29/4958H01L29/78
Inventor 李高原顾林何亮亮
Owner SHANGHAI HUALI MICROELECTRONICS CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products