Diode chip structure and preparation method thereof

Abstract

The invention discloses a diode chip structure and a preparation method thereof. The diode comprises an N + substrate, and an N buffer layer and an N- epitaxial region which are sequentially stacked and grown on the top of the N + substrate; a P + ring region is embedded at the outer end of the top of the N- epitaxial region, a central region in the top of the N- epitaxial region is a P base region, an active P + region is periodically embedded in the P base region, a metalized anode is manufactured at the top of the P base region, silicon oxide is manufactured at the top of the P + ring region, boron phosphorosilicate glass is passivated at the top of the silicon oxide, the boron phosphorosilicate glass is covered by silicon nitride, and a metalized cathode is arranged on the back surface of the N + substrate. According to the invention, the N buffer layer at the bottom of the N- epitaxial region can buffer the expansion of the space charge region, slow down the reverse extraction speed of carriers, and soften the recovery characteristics. The active P + region is periodically embedded in the P base region, the anode injection efficiency can be remarkably reduced, reverse storage charges are reduced, the reverse recovery time is shortened, a junction terminal is of a floating field limiting ring structure, the voltage endurance capability of the diode is enhanced, and the reverse leakage current of the device is reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a diode chip structure and a preparation method. Background technique [0002] Fast recovery diodes have the characteristics of good switching characteristics and short reverse recovery time. They are mainly used in electronic circuits such as switching power supplies, PWM pulse width modulators, and frequency converters, as high-frequency rectifier diodes, freewheeling diodes, or damping diodes. [0003] Existing fast recovery diodes such as figure 1 As shown, its structure includes: lightly doped N-drift region 100; heavily doped P+ region 200 on top of lightly doped N-drift region 100; anode metal layer 300 on top of heavily doped P+ region 200; Doping the heavily doped N+ substrate layer 400 at the bottom of the N-type drift region 100 ; and the cathode metal layer 500 at the bottom of the heavily doped N+ substrate layer 400 . [0004] When the above-mentioned diode...

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Problems solved by technology

[0004] When the above-mentioned diode is in forward conduction, a large number of minority carrier holes and electrons are stored in the lightly doped N-drift region and the heavily doped P+ region. When the device is turned off, its depletion region is lightly doped The N-drift region and the heavily doped P+ region expand outward; due to the lower concentration on the side of the lightly doped N-drift region, the depletion region mainly expands to the side of the lightly doped N-drift region; in the depletion region In the process of expansion, the minority carriers in the area passed by the depletion region are quickly swept out, causing the reverse recovery current to rapidly decrease to zero, making the fast recovery diode softer, resulting in a large overshoot voltage in the loop , causing damage to system circuit components

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