High-density multi-mode neural microelectrode array and preparation and integration method thereof
A microelectrode array, high-density technology, applied in microelectronic microstructure devices, televisions, circuits, etc., can solve problems such as poor compatibility, and achieve the effects of improving multi-functional integration, realizing multi-functional integration, and reducing coupling loss.
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0040] like figure 2 As shown, the specific preparation steps of a high-density multimodal neural microelectrode array are as follows:
[0041] (1) First, if figure 2 A PECVD system was used to deposit 1-micron-thick silicon oxide on SOI substrates, and photolithography and reactive ion etching (RIE) techniques were used to pattern the silicon oxide into 2-micron linewidths and Lines with 2 micron line spacing. Using the patterned silicon oxide as a hard mask, anisotropic deep silicon etching technology is used to form a plurality of rectangular channels with a width and a spacing of 2 microns arranged side by side on the top silicon of the SOI silicon wafer.
[0042] (2) Next, if figure 2 As shown in the parts b and b' of the middle, the process parameters of deep silicon etching are adjusted, and the rectangular channel is etched into a tubular channel with a diameter of 2-3 microns by using the isotropic deep silicon etching technology (the cross section is excellent...
Embodiment 2
[0054] The specific preparation steps of a high-density multimodal neural microelectrode array are as follows:
[0055] (1) First, a PECVD system was used to deposit 1 μm thick silicon nitride on the SOI substrate, and photolithography and reactive ion etching (RIE) techniques were used to pattern the silicon oxide into 2 μm line widths and spacings multiple lines. Using the patterned silicon nitride as a hard mask, a rectangular channel with a width of 2 microns is formed on the top silicon of the SOI silicon wafer by anisotropic deep silicon etching technology.
[0056] (2) Next, the process parameters of the deep silicon etching are adjusted, and the rectangular channel is etched into a tubular channel with a diameter of 2-3 microns by using the isotropic deep silicon etching technology.
[0057] (3) Then, use a plasma enhanced chemical vapor deposition system (PECVD) to deposit a layer of silicon nitride with a thickness of 200 nanometers on the silicon wafer as an insula...
PUM
| Property | Measurement | Unit |
|---|---|---|
| Diameter | aaaaa | aaaaa |
| Length | aaaaa | aaaaa |
| Width | aaaaa | aaaaa |
Abstract
Description
Claims
Application Information
Login to View More 


