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Nano tunnel and silver nanoparticle coexisting organic field effect transistor memory and preparation method thereof

A silver nanoparticle and memory technology, applied in the fields of organic semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve the problems of insensitive optoelectronic regulation, low storage density, complex surface morphology regulation, etc., and achieve excellent optoelectronic synergy. effect, large storage window, ease of promotion and the effect of integrating commercial applications

Pending Publication Date: 2022-05-17
NANJING UNIV OF POSTS & TELECOMM
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the existing charge storage layer still has problems such as complex surface morphology control, low storage density, and insensitive photoelectric control.

Method used

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  • Nano tunnel and silver nanoparticle coexisting organic field effect transistor memory and preparation method thereof
  • Nano tunnel and silver nanoparticle coexisting organic field effect transistor memory and preparation method thereof
  • Nano tunnel and silver nanoparticle coexisting organic field effect transistor memory and preparation method thereof

Examples

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Embodiment 1

[0039] Airport effect transistor memory coexisting with silver nanoparticles, structure diagram such as Figure 1 Shown, from top to bottom comprising a source leakage electrode 1, an organic semiconductor layer 2, a charge storage layer, a gate insulation layer 3, a substrate and a gate electrode formed on top of the substrate 4; wherein the charge storage layer is two layers, the first layer is a polymer layer having a nano-tunnel structure 5, the second layer is a silver nanoparticle layer 6 evenly distributed above the polymer layer.

[0040] The airport effect transistor memory to N-type re-doped silicon as a gate electrode 4, on top of which the 50nm thick silica is grown as the gate insulation layer 3; first by the chloroform dissolved in PVK solution spin coating to prepare a polymer film (polymer layer 5), and then on the polymer film spin coated silver nanoparticle aqueous solution (silver nanoparticle layer 6), forming a nano-tunnel and silver nanoparticle coexistence c...

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Abstract

The invention discloses a nano tunnel and silver nanoparticle coexisting organic field effect transistor memory and a preparation method thereof. The memory structurally comprises a source and drain electrode, an organic semiconductor layer, a charge storage layer, a gate insulating layer, a substrate and a gate electrode formed on the substrate from top to bottom in sequence, wherein the charge storage layer comprises two layers, the first layer is a polymer layer with a nano tunnel structure, and the second layer is a silver nanoparticle layer uniformly distributed on the polymer layer. The charge storage layer is prepared by adopting a secondary spin-coating solution processing method, the preparation process is simple, and large-area preparation can be realized. The film morphology of the nanopore can be regulated and controlled by simply adjusting the spin-coating rotating speed through primary spin-coating, and then the silver nanoparticles are uniformly distributed on the nanopore morphology through secondary spin-coating. The storage capacity, the high mobility and the switch ratio are achieved, the stability is greatly improved, the price is low, the cost is saved, and popularization and integrated commercial application are facilitated.

Description

Technical field [0001] The present invention belongs to the field of semiconductor memory technology, specifically relates to a nano-tunnel and silver nanoparticle coexistence of airport effect transistor memory and preparation method thereof. Background [0002] In the era of big data and artificial intelligence, a large number of information storage and high-speed transmission urgently need to be solved. Airport Effect Transistor (OFET) memory devices have become a hot topic of research due to their advantages of non-destructive reading, easy integration, and compatibility with existing CMOS. OfET storage devices, storage windows, read and write erasure cycles, current switching ratios and maintenance time are key parameters to distinguish the memory level and determine the reliability memory of the system. Charge-trapping materials are typically injected and released by electric field forces, and to date, with the rapid development of research, numerous studies have shown tha...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L51/30H01L51/05H01L51/10H01L51/40
CPCH10K71/12H10K10/80H10K10/466H10K2102/00
Inventor 仪明东蒋惠李雯陈叶俞松城
Owner NANJING UNIV OF POSTS & TELECOMM
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