39results about How to "Increase storage window" patented technology

The invention discloses a charge-trapping memory based on a single-layer barium strontium titanate (BST) thin film, and its structure is a P-type Si substrate, a SiO 2 tunneling layer, barium strontium titanate capture barrier layer and Pd electrode layer. At the same time, the preparation method of the memory is also disclosed. The P-type Si substrate is washed and dried, and a barium strontium titanate capture barrier layer is formed on the Si substrate by magnetron sputtering. SiO 2 tunneling layer, and then a Pd electrode layer was formed on the barium strontium titanate capture barrier layer by magnetron sputtering. The present invention prepares p-Si substrate / SiO through specific materials and methods 2 A charge-trapping memory with a composite structure of tunneling layer / barium strontium titanate trapping layer / Pd electrode layer. Tests show that, compared with the existing memory of the same type, the memory provided by the present invention has a larger storage window and better data retention, and is a memory device that is fatigue-resistant, has a fast writing / erasing rate, and has wider application prospects. of memory.

The invention provides a dual-function device for storing and gating, which includes a bottom electrode, a conversion layer and a top electrode from bottom to top, the bottom electrode is TiN or conductive glass, the conversion layer is niobium oxide, and the The top electrode is tungsten. The invention uses niobium oxide as the conversion layer, uses TiN or conductive glass as the bottom electrode, and metal tungsten as the top electrode to form a device with dual functions of storage and gating. Experimental results show that the device provided by the present invention has gating performance when there is a large current limit, and has resistive switching performance (i.e. storage performance) when small current limiting; Simultaneously in the gating and resistive switching performance test, cycle test 100 circles, The deviation degree of the obtained curve is very small, indicating that it also has excellent stability; in the resistance switching performance test, the resistance value of the high-resistance state is greater than 10 than the resistance value of the upper low-resistance state, indicating that the device also has a large Storage window.

The invention discloses a resistive variable memory and a preparation method thereof. The preparation method of the resistive variable memory comprises: selecting a substrate layer; growing a first electrode on the substrate layer; growing a resistive variable layer on the first electrode ; growing several second electrodes on the resistive variable layer; etching away the resistive variable layer and the second electrodes on one side until the first electrodes leak out, so as to complete the preparation of the resistive variable memory. In the preparation of the resistive variable memory, the present invention selects an appropriate dopant for the resistive variable layer, so that the storage window of the resistive variable memory is increased, and the resistive variable memory also has a forming-free characteristic.

The present invention involves a double -layer floating grid flexible organic storage device and its preparation methods. The invention is mainly based on substrate, medium layer, control grid, blocking layer, first floating grid layer, isolation layer, second floating grid layer, tunnel, tunnel, tunnel, tunnel, tunnelThe wearing layer, organic semiconductor layer, source electrode and leakage electrode composition, where the source electrode and leakage electrode are located on the tunnel through the tunnel layer.The use of double -layer gold nano crystals as the floating grille layer will help improve the storage window of the storage device and increase the working voltage range; use femtosecond laser restoration technology to reduce repeated sedimentary electrodes in the middle, simplify the production process, reduce production, and reduce production.The doping of pollution in China is conducive to improving product yields; the blocking layers, quarantine layers, and then wearing layers used in the present invention are all graphene with high -agency constants, which can effectively reduce the leakage current and improve the stability of the memory.It can reduce the working voltage; the materials used in the present invention are flexible, can be bent, and can be applied to a flexible circuit.The femtosecond laser restoration technology, vacuum thermal evaporation and rotation technology used in the preparation process of the present invention, mature process, low production costs, can achieve large -scale production.

The invention discloses a resistive random access memory based on an organic / inorganic hybrid perovskite material and a fabrication method of the resistive random access memory. The resistive random access memory comprises a bottom electrode, a top electrode and a resistance changing functional layer material, wherein the resistance changing functional layer material is arranged between the bottom electrode and the top electrode and comprises one layer or multiple layers of organic / inorganic hybrid perovskite thin film materials. The fabrication method comprises the following steps of (1) cleaning a substrate; (2) depositing the bottom electrode on the substrate by employing a physical vapor deposition technique; (3) forming the organic / inorganic hybrid perovskite thin film material on the bottom electrode as a resistance changing functional layer by techniques such as spin coating, dip coating and vacuum evaporation; and (4) depositing the top electrode on the resistance changing functional layer by employing the physical vapor deposition technique. According to the resistive random access memory, the structure is simple, and low-temperature and low-cost fabrication can be carried out; and the fabricated device has the technical advantages of large memory window, low conversion voltage, high conversion speed, multi-value storage capability, favorable thermal stability and device durability and the like.

The invention discloses a multi-resistance state double-layer thin-film structure resistive variable memory and a preparation method thereof. The resistive variable memory has stable retention characteristics and multi-value storage performance. Specifically, it uses metal Ti / Au as the upper electrode, ITO as the substrate and the lower electrode, and uses radio frequency magnetron deposition technology to successively plate on the ITO substrate. TiO: Cu and Ga2O3 films to form a resistive layer, and then sputtering titanium (Ti) and gold (Au) films on the ITO substrate and the film that has been plated with gallium oxide to form ITO / TiO: Cu / Ga2O3 / Ti / Au structure memory device, and realize the multi-valued storage function. The advantage of the present invention is that single and bipolar resistive switching is generated through the movement of defects at the heterojunction interface, and the resistive switching memory device prepared has stable retention characteristics, cycle characteristics and multi-resistance state resistive switching storage performance, which improves the memory performance. storage capacity and service life.

The invention relates to a resistive variable memory and a preparation method thereof, belonging to the technical field of information storage devices. In the metal-insulator-metal (MIM) sandwich structure of the resistive variable memory, the top electrode and the bottom electrode of the MIM structure are respectively metal electrodes, and the resistive variable medium between the metal electrodes is an amorphous strontium oxide thin film. The invention adopts the strontium oxide film as the resistive variable material, and can prepare the resistive variable memory with low power consumption, high storage window and good stability, thereby having the potential of multi-value storage and high-density storage.

The present invention provides a programming method of ferro-electric dynamic random memory single-tube unit array, belonging to the field of semiconductor integrated circuit design and manufacture technology. In the course of programming true unit said method can apply the voltage for inhibiting programming to word line, bit line and source line of non-true unit so as to make the range of programming voltage which can be applied to said single-tube unit array be further increased, so that the larger storage window can be obtained.

The invention discloses a memory and a manufacturing method of the memory. The memory structurally comprises a semiconductor substrate, a channel region, a grating stack and a source region or a drain region, wherein the channel region is arranged on the semiconductor substrate; the grating stack is arranged on the channel region and comprises a tunneling layer, a charge trapping layer, a barrier layer and a gate electrode layer; the tunneling layer is arranged on the channel region; the charge trapping layer is arranged on the tunneling layer; the barrier layer is arranged on the charge trapping layer; the gate electrode layer is arranged on the barrier layer; the source region or the drain region is arranged on two sides of the channel region and is embedded in the semiconductor substrate; and the charge trapping layer comprises a first charge trapping layer and a second charge trapping layer(s), wherein the second charge trapping layers which are arranged above or / and below the first charge trapping layer.

The invention discloses an all-inorganic perovskite resistive variable memory and a preparation method thereof. The memory structure includes a bottom electrode, a resistive layer and a top electrode from bottom to top. ITO as bottom electrode, CsPbBr 3 The thin film is used as the resistive switch layer, and metal Pt, or Au, or W is used as the top electrode. The preparation step is to CsPbBr 3 The powder was dissolved in DMSO solution to prepare the precursor solution, and the precursor solution was spin-coated on the ITO bottom electrode with a spin coater, and then toluene was added dropwise as an anti-solvent to rapidly crystallize the perovskite layer, and annealed at 100-150°C for 10 ~30min, obtain dense CsPbBr 3 polycrystalline film. Then in CsPbBr 3 A top electrode is deposited on the surface of the film. The resistance switch layer of the memory is made of all inorganic materials, the preparation process is simple, and the cost is low. By changing the heating temperature and heating time, the device exhibits excellent resistance change characteristics and air thermal stability.

The invention relates to a multiple-valued non-volatile memory and a preparation method thereof. The memory comprises a semiconductor substrate, wherein both ends of the semiconductor substrate include a source electrode and a drain electrode respectively along the direction of a memory bit line and both ends of the semiconductor substrate include a shallow tunnel isolation structure respectively along the direction of a memory sub-line. A tunneling dielectric layer, a charge storage layer, a charge blocking layer, and a gate electrode are sequentially arranged on the semiconductor substrate, wherein the charge storage layer is a combination of two different storage materials which are alternatively arranged along the direction of the memory sub-line. The multiple-valued non-volatile memory of the invention adopts the storage layer formed by alternatively arranging the two different materials, which increases the storage density, promises a large window while reducing the thickness of a gate dielectric layer greatly,. Therefore, multiple-valued storage and high-density storage are realized the cost is reduced in turn.