The invention provides a device array of a
silicon carbide gate turn-off
thyristor GTO and a preparation method thereof, wherein each single device is relatively small in size. The device array is formed by photoetching according to a corresponding photoetching
layout and comprises at least two array structures of
silicon carbide gate turn-off thyristors. The gate
electrode of a GTO device unit islocated in the center of the table surface of the device unit. The gate
electrode of the GTO device unit forms an interdigital structure together with anodes located on the two sides of the table surface of the device unit. A
cathode is located on the back surface of the substrate of the device unit. During the packaging process, the gate electrodes of all device units are led down to a packagingstructure according to the
layout design. Meanwhile, all anodes are led out in the opposite directions of the gate electrodes. According to the device array scheme adopted by the invention, the effective working area of a whole packaging
chip can be remarkably improved. The condition that the performance of the whole packaging
chip is reduced due to the defects of local materials can be avoided.Moreover, the process difficulty of device
machining can be reduced, and the process stability and the process uniformity can be improved. The yield of prepared devices can be remarkably improved.