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Manufacturing method of silicon carbide groove MOS (Metal Oxide Semiconductor) gate-controlled thyristor with three layers of epitaxy

A manufacturing method and technology of silicon carbide, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as high injection energy, avoid complex processes, improve channel mobility, and avoid lattice damage. Effect

Pending Publication Date: 2022-07-22
GLOBAL POWER TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

For silicon carbide materials, diffusion doping requires extremely high temperatures, so high-temperature ion implantation is generally used for doping silicon carbide devices, and high-temperature ion implantation will destroy the original lattice structure of the material, requiring an annealing temperature above 1600°C to repair and activate , and making the implanted junction depth reach 2um and above requires high implantation energy, which is a huge challenge for equipment and process

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  • Manufacturing method of silicon carbide groove MOS (Metal Oxide Semiconductor) gate-controlled thyristor with three layers of epitaxy
  • Manufacturing method of silicon carbide groove MOS (Metal Oxide Semiconductor) gate-controlled thyristor with three layers of epitaxy
  • Manufacturing method of silicon carbide groove MOS (Metal Oxide Semiconductor) gate-controlled thyristor with three layers of epitaxy

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Embodiment Construction

[0027] What the present invention aims to solve is that, in view of the harsh requirements on equipment and processes brought about by the MCT structure formed by traditional doping, the SIC MCT structure is realized by using SIC multilayer epitaxy as the wafer material and dry etching grooves;

[0028] like Figures 1 to 8 As shown, a manufacturing method of a silicon carbide grooved MOS gate-controlled thyristor with three-layer epitaxy of the present invention includes the following steps:

[0029] Step 1. Use a silicon carbide three-layer epitaxial wafer. The silicon carbide three-layer epitaxial wafer is an N+-type substrate 2, a P-type buffer zone 3, a P-type drift region 4, which are stacked from bottom to top. The N-type base region 5 and the P+ emitter region 6, the three-layer epitaxy of silicon carbide is the P-type drift region 4, the N-type base region 5 and the P+ emitter region 6; a mask is deposited on the wafer, and the corresponding light is used. The mask i...

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Abstract

The invention provides a manufacturing method of a silicon carbide groove MOS (Metal Oxide Semiconductor) gate-controlled thyristor with three layers of epitaxy, which comprises the following steps of: depositing a mask on a silicon carbide three-layer epitaxy wafer by adopting the silicon carbide three-layer epitaxy wafer, and etching and tapping the mask by using a corresponding photolithography mask; groove etching is carried out on the P + emitter region through mask blocking, the P + emitter region is etched through to expose the N-type base region, and the mask layer is removed; depositing on the wafer to form a mask, and etching and trepanning the mask by using a corresponding photolithography mask; groove etching is carried out on the P + emitter region and the N-type base region through mask blocking, the P + emitter region and the N-type base region are etched through to expose the P-type drift region, and the mask layer is removed; forming a first gate oxide layer, a second gate oxide layer, a first polysilicon gate electrode and a second polysilicon gate electrode in the N + region; metal electrodes are grown on the surface of the wafer to form an anode metal electrode and a cathode metal electrode, and manufacturing is convenient.

Description

technical field [0001] The invention relates to a manufacturing method of a silicon carbide groove MOS gate-controlled thyristor with three-layer epitaxy. Background technique [0002] MOS gated thyristor (MCT) has attracted a lot of attention in recent years as a power electronic device in the direction of compounding and power integration. It structurally combines four layers of PNPN thyristors and MOSFETs that can control the turn-on and turn-off of the device. It combines the high input impedance, low driving power and fast switching process of MOSFET with the advantages of high current, high withstand voltage and low on-voltage drop of thyristor. When the MCT is turned on, it enters the hold state, and the conductance modulation effect is obvious. In high-voltage applications, it can effectively reduce the on-state resistance, thereby reducing the on-state voltage drop, enabling fast turn-on and turn-off with low switching loss and a simple drive circuit. [0003] As ...

Claims

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Application Information

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IPC IPC(8): H01L21/332H01L21/04H01L29/06H01L29/745H01L29/749
CPCH01L29/66068H01L21/0475H01L29/0684H01L29/749H01L29/7455
Inventor 杨光锐张长沙李昀佶陈彤
Owner GLOBAL POWER TECH CO LTD
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