Method and apparatus for the improvement of material/voltage contrast

Abstract

A method and system for registering a CAD layout to a Focused Ion Beam image for through-the substrate probing, without using an optical image and without requiring biasing, includes an improved method of trench endpointing during the FIB milling operation with a low beam energy. The method further includes removal of Ga at the trench floor using XeF2, as well as the deposition of an insulating layer onto the trench floor.

Description

CROSS REFERENCE TO RELATED APPLICATIONS [0001] This application is a divisional of copending U.S. application Ser. No. 10 / 789,336, filed on Feb. 27, 2004, and claims priority thereto. The specification of U.S. application Ser. No. 10 / 789,336 is hereby incorporated by reference. [0002] This application is further related to U.S. Provisional Applications No. 60 / 450,636 by Erwan Le Roy and William Thompson, filed Feb. 28, 2003, and No. 60 / 523,063 by Erwan Le Roy and William Thompson, filed Nov. 18, 2003, and claims priority to both of these provisional applications. [0003] This application is further related to commonly owned U.S. application Ser. No. 10 / 758,146 entitled “METHOD AND SYSTEM FOR INTEGRATED CIRCUIT BACKSIDE NAVIGATION”, filed Jan. 14, 2004.BACKGROUND OF THE INVENTION [0004] As IC technology advances and device dimensions decrease while circuit speeds increase, packaging and diagnostic techniques have advanced accordingly. Methods for modification and editing of circuits a...

AI Technical Summary

Benefits of technology

Enables precise registration of CAD to FIB images and accurate endpointing during trench milling, facilitating non-destructive and accurate editing of ICs without optical imaging or voltage biasing, while also enabling imaging of vertical doping profiles.

Problems solved by technology

The stacking of increasingly large numbers of metal layers has limited the access to lower metal layers from the wafer frontside.

In addition, the widespread use of flipchip mounting, wherein the IC is mounted face down on a packaging substrate, leaving only the backside of the chip exposed, precludes front side access to the chip.

A challenge in backside editing is navigation, i.e., locating the exact circuit node where a modification or repair is needed.

However, this prior method is not effective in imaging non-biased regions.

Additionally, operational complexity is introduced by this method, since a special socket for each particular device and the interconnect board to the electrical bias is required to provide the bias, and an increased knowledge level is required to know which pins should be biased relative to which others.

Images