Eureka AIR delivers breakthrough ideas for toughest innovation challenges, trusted by R&D personnel around the world.

Semiconductor Substrate, Semiconductor Device and Method of Manufacturing a Semiconductor Substrate

a semiconductor substrate and semiconductor technology, applied in the field of semiconductor substrates, can solve the problems of limited dislocation-free areas, essentially non-equilibrium defects, and techniques that cannot be used for narrow devices like laser diodes, and achieve enhanced probability of dislocation reactions, increased area, and high index facets

Inactive Publication Date: 2008-12-18
OPTOGAN OY
View PDF27 Cites 6 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0015]A semiconductor device in accordance with the present invention is characterized by what is presented in claim 4. The semiconductor device is made of nitrides of group III metals having wurtzite crystal structure and grown in vapor phase either on a (0001) oriented foreign substrate, lattice mismatched to the semiconductor device materials, or on existing (0001) oriented highly dislocated layer of the semiconductor device materials. The device comprises a semiconductor substrate and device layers positioned above said substrate. According to the present invention, the semiconductor substrate comprises a dislocation redirection layer, in which inclination of threading dislocations towards high index crystallographic planes, having indexes other than (0001) and those of the type {1 100}, is arranged in order to enhance the probability of the threading dislocations to meet each other; and a dislocation reaction layer, in which the threading dislocations coalesce with each other resulting in reduced threading dislocation density at the semiconductor substrate surface. The semiconductor device can be e.g. a LED or a laser diode. Clear advantages are achieved with this structure in form of better quality of the device layers due to the low dislocation density throughout the semiconductor substrate surface.
[0028]The present invention provides essential advantages compared to the prior art. The substrate according to the invention can have drastically reduced threading dislocation density throughout the surface and is thus well suitable for further epitaxial growth of device layers. The manufacturing method of the invention includes only in situ process steps while many variations of traditional methods necessitate unwanted ex situ processing. The method of the invention is also well controllable in contrast to e.g. micromasking method of the prior art including random mask coverage.

Problems solved by technology

Despite of their high density, TDs are essentially non-equilibrium defects.
However dislocation-free areas in this case are limited to the narrow stripes above dielectric stripes.
Therefore these techniques can only be used for narrow devices like laser diodes.
One of the disadvantages of these variations is that they are ex situ processes.
The efficiency of these techniques is limited by the fact that the mask regions are distributed randomly and do not provide selective treatment of the dislocated regions.
According to the preceding prior art description, despite of all development in the area the known solutions still have plenty of drawbacks and weaknesses.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Semiconductor Substrate, Semiconductor Device and Method of Manufacturing a Semiconductor Substrate
  • Semiconductor Substrate, Semiconductor Device and Method of Manufacturing a Semiconductor Substrate
  • Semiconductor Substrate, Semiconductor Device and Method of Manufacturing a Semiconductor Substrate

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0039]Reference will now be made in detail to the embodiments and examples relating to the present invention, which are illustrated in the accompanying figures.

[0040]The semiconductor device 20 of FIG. 1 comprises a semiconductor substrate 1. Semiconductor substrate includes a foreign substrate 2 or a highly dislocated layer 3 of the semiconductor substrate materials, a dislocation redirection layer 4 and a dislocation reaction layer 5. Device layers 21 are grown on the semiconductor substrate surface 7. Threading dislocations (TDs) 6 formed in the early stage of the dislocation redirection layer 4 growth deviate upper in the layer from the initially vertical orientation. In the dislocation reaction layer 5 TDs 6 coalesce with each other thus reducing the dislocation density of the semiconductor substrate 1. As result, the semiconductor substrate surface 7 is of high crystalline quality with a low dislocation density and as such well suitable for further growing of the device layers...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
temperatureaaaaaaaaaa
Login to View More

Abstract

A semiconductor substrate (1) of the present invention is made of nitrides of group III metals having wurtzite crystal structure and is grown in vapor phase either on a (0001) oriented foreign substrate (2), lattice mismatched to the semiconductor substrate materials, or on existing (0001) oriented highly dislocated layer (3) of the semiconductor substrate materials and has a highly reduced dislocation density. According to the present invention, a structure is utilized for the dislocation density reduction, which comprises a dislocation redirection layer (4) providing intentional inclination of threading dislocations (6) towards high index crystallographic planes having crystallographic indexes other than (0001) and those of the type {1 100}, in order to enhance the probability for dislocation reactions; and a dislocation reaction layer (5) positioned above said dislocation layer (4), in which the threading dislocations (6) coalesce with each other resulting in reduced threading dislocation density at the semiconductor substrate surface (7).

Description

FIELD OF THE INVENTION[0001]The invention relates in general to a semiconductor substrate with reduced threading dislocation density. More particularly, the semiconductor substrate is formed of nitrides of group III metals with wurtzite crystal structure and grown in vapor phase either on a (0001) oriented foreign substrate, lattice mismatched to the semiconductor substrate materials, or on existing (0001) oriented highly dislocated layer formed of the semiconductor substrate materials. The invention also relates to a device utilizing and a method of manufacturing such substrate.BACKGROUND OF THE INVENTION[0002]Growth of (0001) oriented nitrides of group III metals with wurtzite crystal structure on a foreign substrate with large lattice mismatch, e.g. sapphire, silicon carbide, silicon, or zinc oxide, occurs via formation of three-dimensional islands on the surface of the substrate. Usually, as the first step, a thin layer is deposited on the substrate at a low temperature. This la...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(United States)
IPC IPC(8): H01L29/04H01L29/267H01L21/205H01LH01L21/20H01L29/20
CPCH01L29/2003H01L29/045H01L21/02458H01L21/0254H01L21/02505H01L21/0242H01L21/20
Inventor ODNOBLYUDOV, MAXIMBOUGROV, VLADISLAVROMANOV, ALEXEILANG, TEEMU
Owner OPTOGAN OY
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Eureka Blog
Learn More
PatSnap group products