Semiconductor Substrate, Semiconductor Device and Method of Manufacturing a Semiconductor Substrate

a semiconductor substrate and semiconductor technology, applied in the field of semiconductor substrates, can solve the problems of limited dislocation-free areas, essentially non-equilibrium defects, and techniques that cannot be used for narrow devices like laser diodes, and achieve enhanced probability of dislocation reactions, increased area, and high index facets

Inactive Publication Date: 2008-12-18
OPTOGAN OY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0021]In one preferred embodiment of the method of the present invention the growing of said dislocation redirection layer comprises the steps of 1) formation of said precipitates on the surface of said foreign substrate or said existing highly dislocated layer; and 2) preferential growing of crystallographic plane facets with crystallographic indexes other than (0001) and those of the type {1 100}. For the initially vertical threading dislocations locating mainly in the boundaries of the merged precipitates, it is energetically favorable to change their direction of propagation during further growth, which provides increasing areas of the high index facets. The theory of this process is explained earlier in this document. In result, the necessary conditions for reactions among inclined TDs are achieved. During preferential growth of (0001) facets of the dislocation reaction layer the enhanced probability of dislocation reactions is maintained.
[0022]In another preferred embodiment of the method of the present invention growing of said dislocation redirection layer comprises the steps of 1) formation of said precipitates on the surface of said foreign substrate or said highly dislocated layer; 2) preferential growing of crystallographic plane facets with crystallographic indexes other than (0001) and those of the type {1 100}; 3) in situ deposition of amorphous material into the surface potential minima located in grooves; and 4) preferential growing of crystallographic plane facets with crystallographic indexes other than (0001) and those of the type {1 100}. By in situ depositing amorphous material on the surface potential minima enhanced inclination of the dislocations can be facilitated. The second step is stopped as long as merging of the precipitates of the semiconductor material formed on substrate surface starts to occur. Threading dislocations of the edge type are formed at the boundaries of the merging precipitates. At this stage of growth, the emerging positions of these edge type threading dislocations are mostly located in the grooves between the neighboring precipitates. The next step of the process comprises in situ deposition of amorphous material. Due to surface diffusion assisted kinetics, the atoms of the amorphous material tend to arrive to the surface potential minima located in the grooves. At this phase, the threading dislocations stay at the interface between the amorphous material and the semiconductor material, because presence of the amorphous material decreases potential barrier for dislocation inclination. The amount of amorphous material deposited should be chosen to ensure the dislocations to stay inclined during subsequent growth of the dislocation reaction layer. The optimal amount depends on materials used and can be e.g. chosen to provide coverage from 5 to 70% of the groove height. During further growth, which provides increasing areas of the high index facets, the threading dislocations will stay inclined tending to direct towards said high index planes. During the growth of the dislocation reaction layer with preferential growing of (0001) facets the dislocations stay inclined thus maintaining the enhanced probability for dislocation reactions. In result, a compact low dislocation density semiconductor substrate is obtained.

Problems solved by technology

Despite of their high density, TDs are essentially non-equilibrium defects.
However dislocation-free areas in this case are limited to the narrow stripes above dielectric stripes.
Therefore these techniques can only be used for narrow devices like laser diodes.
One of the disadvantages of these variations is that they are ex situ processes.
The efficiency of these techniques is limited by the fact that the mask regions are distributed randomly and do not provide selective treatment of the dislocated regions.
According to the preceding prior art description, despite of all development in the area the known solutions still have plenty of drawbacks and weaknesses.

Method used

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  • Semiconductor Substrate, Semiconductor Device and Method of Manufacturing a Semiconductor Substrate

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Embodiment Construction

[0039]Reference will now be made in detail to the embodiments and examples relating to the present invention, which are illustrated in the accompanying figures.

[0040]The semiconductor device 20 of FIG. 1 comprises a semiconductor substrate 1. Semiconductor substrate includes a foreign substrate 2 or a highly dislocated layer 3 of the semiconductor substrate materials, a dislocation redirection layer 4 and a dislocation reaction layer 5. Device layers 21 are grown on the semiconductor substrate surface 7. Threading dislocations (TDs) 6 formed in the early stage of the dislocation redirection layer 4 growth deviate upper in the layer from the initially vertical orientation. In the dislocation reaction layer 5 TDs 6 coalesce with each other thus reducing the dislocation density of the semiconductor substrate 1. As result, the semiconductor substrate surface 7 is of high crystalline quality with a low dislocation density and as such well suitable for further growing of the device layers...

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Abstract

A semiconductor substrate (1) of the present invention is made of nitrides of group III metals having wurtzite crystal structure and is grown in vapor phase either on a (0001) oriented foreign substrate (2), lattice mismatched to the semiconductor substrate materials, or on existing (0001) oriented highly dislocated layer (3) of the semiconductor substrate materials and has a highly reduced dislocation density. According to the present invention, a structure is utilized for the dislocation density reduction, which comprises a dislocation redirection layer (4) providing intentional inclination of threading dislocations (6) towards high index crystallographic planes having crystallographic indexes other than (0001) and those of the type {1 100}, in order to enhance the probability for dislocation reactions; and a dislocation reaction layer (5) positioned above said dislocation layer (4), in which the threading dislocations (6) coalesce with each other resulting in reduced threading dislocation density at the semiconductor substrate surface (7).

Description

FIELD OF THE INVENTION[0001]The invention relates in general to a semiconductor substrate with reduced threading dislocation density. More particularly, the semiconductor substrate is formed of nitrides of group III metals with wurtzite crystal structure and grown in vapor phase either on a (0001) oriented foreign substrate, lattice mismatched to the semiconductor substrate materials, or on existing (0001) oriented highly dislocated layer formed of the semiconductor substrate materials. The invention also relates to a device utilizing and a method of manufacturing such substrate.BACKGROUND OF THE INVENTION[0002]Growth of (0001) oriented nitrides of group III metals with wurtzite crystal structure on a foreign substrate with large lattice mismatch, e.g. sapphire, silicon carbide, silicon, or zinc oxide, occurs via formation of three-dimensional islands on the surface of the substrate. Usually, as the first step, a thin layer is deposited on the substrate at a low temperature. This la...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L29/04H01L29/267H01L21/205H01LH01L21/20H01L29/20
CPCH01L29/2003H01L29/045H01L21/02458H01L21/0254H01L21/02505H01L21/0242H01L21/20
Inventor ODNOBLYUDOV, MAXIMBOUGROV, VLADISLAVROMANOV, ALEXEILANG, TEEMU
Owner OPTOGAN OY
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