Leakage reduction in DRAM MIM capacitors

Abstract

A method for forming a DRAM MIM capacitor stack having low leakage current involves the use of a first electrode that serves as a template for promoting the high-k phase of a subsequently deposited dielectric layer. The high-k dielectric layer includes a doped material that can be crystallized after a subsequent annealing treatment. An amorphous blocking is formed on the dielectric layer. The thickness of the blocking layer is chosen such that the blocking layer remains amorphous after a subsequent annealing treatment. A second electrode layer compatible with the blocking layer is formed on the blocking layer.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This is a Continuation application of U.S. patent application Ser. No. 13 / 621,910, filed on Sep. 18, 2012, which is herein incorporated by reference for all purposes.[0002]This document relates to the subject matter of a joint research agreement between Intermolecular, Inc. and Elpida Memory, Inc.FIELD OF THE DISCLOSURE[0003]The present invention generally relates to the field of dynamic random access memory (DRAM), and more particularly to dielectric material processing for improved DRAM performance.BACKGROUND OF THE DISCLOSURE[0004]Dynamic Random Access Memory utilizes capacitors to store bits of information within an integrated circuit. A capacitor is formed by placing a dielectric material between two electrodes formed from conductive materials. A capacitor's ability to hold electrical charge (i.e., capacitance) is a function of the surface area of the capacitor plates A, the distance between the capacitor plates d (i.e. the physical ...

AI Technical Summary

Benefits of technology

The patent describes methods for improving the formation of a rutile phase of a titanium oxide dielectric layer in a memory device. By using a crystalline MoO2 first electrode and an amorphous blocking layer, leakage current is reduced and the formation of unwanted phases is prevented. The titanium oxide dielectric layer can be doped to further decrease leakage current. The second electrode is formed on top of the blocking layer, which is compatible with current manufacturing processes. The technical effects of this improvement include reduced leakage current and improved performance of the memory device.

Problems solved by technology

The low band gap may lead to high leakage current in the device.

As a result, without the utilization of countervailing measures, capacitor stacks implementing high k dielectric materials may experience large leakage currents.

The noble metal systems, however, are prohibitively expensive when employed in a mass production context.

Moreover, electrodes fabricated from noble metals often suffer from poor manufacturing qualities, such as surface roughness, poor adhesion, and form a contamination risk in the fab.

However, oxygen-rich phases (MoO2+x) degrade the performance of the MoO2 electrode because they do not promote the deposition of the rutile-phase of TiO2 and have higher resistivity than MoO2.

As discussed above, MoO2 is sensitive to oxidation to form oxygen-rich compounds that negatively impacts its performance as an electrode material.

The reducing atmosphere anneal processes discussed previously with respect to the use of crystalline MoO2 as a first electrode are not an option at this stage of the device manufacture because they would degrade the performance of the dielectric layer through the formation of oxygen vacancies.

Titanium oxide high-k dielectric materials are especially sensitive to processing conditions and increases in the leakage current are observed, likely due to the formation of oxygen vacancies.

However, currently Ru is used for the second electrode due to integration issues surrounding the use of MoO2 as the second electrode.

The small band gap leads to high leakage current through the Schottky emission mechanism due to the small barrier height.

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