CMOS type difference interface circuit

A differential interface and circuit technology, applied in the direction of logic circuit connection/interface layout, logic circuit coupling/interface using field effect transistors, instruments, etc., can solve the problems of increased layout area and high bias level, and achieve fast switching speed , small signal differential mode gain high, low power consumption effect

Inactive Publication Date: 2009-09-09
SOUTHEAST UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The CMOS differential amplifier with PMOSFET input has the following disadvantages: First, the CMOS differential amplifier with PMOSFET input has relatively high requirements on the bias level, and there is a certain optimal level value; secondly, due to the limitation of the PMOS tube itself, in order to achieve a certain differential mode Gain, the CMOS differential amplifier with PMOSFET input requires a higher gate width-to-length ratio for the differential pair tube, which will lead to an increase in the layout area. This is contrary to the requirement of smaller and smaller chip areas. It is also the current CMOS differential Difficult Problems in Common Structures of Interface Circuits

Method used

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Embodiment Construction

[0022] Such as figure 1 As shown, the interface circuit of the present invention consists of three parts, which are figure 1 Dashed boxes I1, I2 and I3 in . I1 is the CMOS differential amplifier of NMOSFET input; Wherein InP and InN are respectively the non-inverting input end and the inverting input end of the two-stage CMOS differential amplifier of the present invention; M1 and M2 are that a pair of NMOS tubes form differential pair tube; M3 and M5 , M4 and M6 as well as M7 and M8 are double-proportional mirror current sources as the loads of M1 and M2; M7 and M8 play the role of double-ended output to single-ended output at the same time; M9 provides the required differential circuit work DC current (tail current), the drain of M9 is node N1.

[0023] The CMOS differential amplifier with PMOSFET input commonly used at present also includes a differential pair tube, a load tube and a tail current part. However, due to the low carrier mobility of the PMOS tube, to achiev...

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Abstract

A CMOS type differential interface circuit, the differential input cascading includes 4 PMOS tubes, respectively M3, M4, M5 and M6; 5 NMOS tubes, respectively M1, M2, M7, M8 and M9; together constitute the NMOSFET input CMOS Differential primary amplifier circuit, in which, M1 and M2 are a pair of NMOS tubes, forming a differential pair of tubes; M3 and M5, M4 and M6, and M7 and M8 are dual-proportional mirror current sources as loads for M1 and M2; M7 and M8 are a pair of The current mirror converts the double-ended output into a single-ended output at the same time, and M9 provides the DC current required for the differential circuit to work, that is, the tail current; after the primary amplifier circuit, a secondary amplifier circuit containing 1 PMOS transistor Mb and 1 NMOS transistor Ma is cascaded , wherein, Ma is an amplifier tube, Mb is a load tube of Ma, and the grid level of the load tube is connected to the ground GND; the secondary amplifier circuit is cascade-connected with buffer outputs containing two directors.

Description

technical field [0001] The invention relates to a differential interface circuit, in particular to a two-stage CMOS differential interface circuit with a special amplifier circuit. This circuit is suitable for LCD and PDP driver chips as their high-speed data transmission interface. When working, it has a high small-signal differential mode gain. At the same time, according to different system power consumption requirements, the bias level for its work has Wide range to choose from. Background technique [0002] With the development of flat-panel display technologies such as PDP and LCD, their panel sizes are getting larger and larger, which leads to higher and higher transmission rates of image signals received by the driving circuits of the display panels. If such a high-speed image signal is transmitted at the traditional TTL level, when the image signal is transmitted through cables or PCB traces, it will emit strong electromagnetic interference to the outside. not ide...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): H03K19/0185G09G3/20G09G3/36G09G3/28
Inventor孙伟锋华国环李杰易扬波陆生礼时龙兴
OwnerSOUTHEAST UNIV