Advanced four-side flat pin-free package and manufacturing method thereof

A leadless packaging, four-sided flat technology, applied in semiconductor/solid-state device manufacturing, electrical components, electric solid-state devices, etc., can solve problems such as limiting the number of I/O, shortening the life of cutting blades, pin failure, etc., to prevent The failure of pin welding, the improvement of surface mount quality, and the effect of preventing chip drift
CN102420205AInactive Publication Date: 2012-04-18BEIJING UNIV OF TECH
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
BEIJING UNIV OF TECH
Publication Date
2012-04-18
Estimated Expiration
Not applicable · inactive patent

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Abstract

The invention discloses an advanced four-side flat pin-free package and a manufacturing method thereof. The advanced four-side flat pin-free package comprises a chip carrier, pins, a metal material layer, an IC (Integrated Circuit) chip, insulated filling materials, a bonding material, a metal wire and a plastic sealing material, wherein the chip carrier is provided with a groove structure and the pins for grounding; and the pins are arranged in a package structure in a plane array form. The metal material layer is configured at the upper surfaces and the lower surfaces of the chip carrier and the pins; the IC chip is configured on the metal material layer at the upper surface of the chip carrier, or configured on the metal material layers at the upper surfaces of the pins; and the insulated filling materials are configured below stepped structures of the plurality of chips and a groove of the chip carrier. A package part is formed by coating and sealing the plastic sealing material; and the chip carrier and the external pins which are exposed out of the bottom surface of a package part structure are provided with protruded parts. According to the advanced four-side flat pin-free package and the manufacturing method thereof disclosed by the invention, the bottleneck of less I / O (Input / Output) is broken through and the reliability of the package is improved.
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Description

technical field

[0001] The invention relates to the technical field of manufacturing semiconductor components, in particular to an advanced quadrilateral flat no-lead package, and the invention also includes a manufacturing method of the package. Background technique

[0002] With the development of electronic products such as mobile phones and notebook computers towards miniaturization, portability, ultra-thinness, multimedia and low-cost requirements for popularization, high-density, high-performance, high-reliability and low-cost packaging forms and Its assembly technology has been developed rapidly. Compared with the expensive BGA and other packaging forms, the new packaging technology developed rapidly in recent years, that is, the quad flat non-lead QFN (Quad Flat Non-lead Package) package, due to its good thermal performance and electrical performance, small size, Many advantages such as low cost and high productivity have triggered a new revolution in the field of m...

Claims

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