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A power vdmos device diode parallel esd protection mechanism

A protection mechanism and diode technology, applied in the direction of semiconductor devices, electric solid state devices, electrical components, etc., can solve the problems of large substrate coupling noise, large drain-source current, etc., and achieve small parasitic capacitance, small leakage current, and reliable operation Effect

Active Publication Date: 2019-01-25
UNIV OF ELECTRONICS SCI & TECH OF CHINA +3
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to provide a power VDMOS device diode parallel ESD protection mechanism to overcome the above shortcomings of the existing ESD protection structure. The power VDMOS device diode parallel ESD protection mechanism adopts a back-to-back diode structure as the ESD protection structure. The production process is simple, and can overcome the shortcomings of the existing technology such as large drain-source current, obvious parasitic effect, and large substrate coupling noise, and has the advantages of good structural stability, reliable ESD protection, and compatibility with the VDMOS device manufacturing process.

Method used

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  • A power vdmos device diode parallel esd protection mechanism
  • A power vdmos device diode parallel esd protection mechanism
  • A power vdmos device diode parallel esd protection mechanism

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Embodiment 1

[0054] Embodiment 1 A power VDMOS device diode parallel ESD protection mechanism

[0055] A kind of power VDMOS device diode parallel connection type ESD protection mechanism of this embodiment, such as Figure 1a , 2a As shown, it includes:

[0056] (1) A power VDMOS device. The power VDMOS device in this embodiment includes several VDMOS units 1 , and all the VDMOS units 1 are arranged equidistantly to form a power VDMOS device together. At the same time, the structure of the VDMOS unit 1 in this embodiment is exactly the same, and the cross-sectional view of the unit structure is shown in image 3 , Figure 4a As shown, the VDMOS unit structure includes a metal interconnection layer 34, an n+ substrate layer 31, and an n- epitaxial layer 32 stacked sequentially from bottom to top, and is formed by diffusing or implanting P-type impurities from top to bottom on the top of the n-epitaxial layer 32. The VDMOS unit p+ area 11 is provided with a VDMOS unit p-Body area 13 arou...

Embodiment 2

[0064] Embodiment 2 A power VDMOS device with an ESD protection structure

[0065] The power VDMOS device with the ESD protection structure of this embodiment also includes a power VDMOS device and an ESD protection structure as in Embodiment 1, and its overall structure is as follows Figure 1b , 2b shown. The difference between this embodiment and Embodiment 1 lies in the composition of the ESD protection structure. The ESD protection structure in the present embodiment comprises several zener diode units 4, and the structure of the zener diode unit 4 is as follows Figure 4b , 5b , 6b, 7b, and 8b, all include a metal interconnection layer 34, an n+ substrate layer 31, and an n- epitaxial layer 32 stacked sequentially from bottom to top, and the top of the n-epitaxial layer 32 extends from top to bottom. A Zener diode unit p+ region 41, the p-Body region 43 of the Zener diode unit is arranged around the Zener diode unit p+ region 41, and the top of the Zener diode unit p...

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Abstract

The invention provides a power VDMOS device diode parallel ESD protection mechanism, which includes a power VDMOS device composed of several VDMOS units, and an ESD protection structure composed of several Zener diode units; the ESD protection structure The equivalent output terminal is connected in parallel to the gate and source terminals of the power VDMOS device; the reverse breakdown voltage of the Zener diode unit is greater than the maximum gate of the diode parallel ESD protection mechanism of the power VDMOS device The source operating voltage is less than the minimum breakdown voltage of the gate oxide layer. The power VDMOS device diode parallel ESD protection mechanism of the present invention has small parasitic capacitance, better protection effect, and more reliable operation. The unit serving as ESD protection is arranged on the n-epitaxy and is isolated from the VDMOS unit, so that the manufacturing process is simple and the structure is stable. And it is compatible with VDMOS device technology. The invention is suitable for ESD protection of power VDMOS devices.

Description

technical field [0001] The invention belongs to semiconductor power devices, in particular to a power VDMOS device diode parallel ESD protection mechanism. Background technique [0002] Among the existing electronic protection devices, the power VDMOS device, which has the advantages of both bipolar transistors and ordinary MOS devices, has the advantages of fast switching speed, low switching loss, high input impedance, low driving power, good frequency characteristics, highly linear transconductance, With the characteristics of high working withstand voltage and low on-resistance, it has been widely used in fields including motor speed regulation, inverter, non-stop power supply, switching power supply, electronic switch, high-fidelity audio, automotive electrical appliances and electronic ballasts. , has broad development and application prospects. [0003] However, the thickness of the gate oxide layer of the existing high-voltage power VDMOS devices is relatively thin,...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/02
Inventor 赵建明徐开凯廖智黄平赵国钟思翰徐彭飞胡兴微蒋澎湃陈勇夏建新
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA