Method for manufacturing oxide semiconductor thin film transistor array substrate

A technology of oxide semiconductor and thin film transistor, which is applied in semiconductor/solid-state device manufacturing, semiconductor device, photolithography process of patterned surface, etc., can solve the problems of rising production cost and complicated process, and achieve improved performance and low process temperature. , the effect of streamlining the process

Active Publication Date: 2015-05-20
KUSN INFOVISION OPTOELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] While the display performance of the prior art liquid crystal display is improved, the disadvantage is that it will require more masks and more complicated manufacturing processes during production, which will increase the production cost.

Method used

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  • Method for manufacturing oxide semiconductor thin film transistor array substrate
  • Method for manufacturing oxide semiconductor thin film transistor array substrate
  • Method for manufacturing oxide semiconductor thin film transistor array substrate

Examples

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no. 1 example

[0045] Figure 1 to Figure 8 It is a schematic cross-sectional view of the manufacturing process of the oxide semiconductor thin film transistor array substrate in the first embodiment of the present invention. The manufacturing method includes:

[0046] Such as figure 1 As shown, the gate 102 is first fabricated and formed on the base substrate 101. Specifically, the base substrate 101 is, for example, a transparent glass substrate. The gate 102 can be fabricated and formed on the base substrate 101 by a photolithography process. The photolithography process mainly includes film deposition, photoresist coating, exposure, development, and etching. Processes such as photoresist removal are well known to those skilled in the art and will not be repeated here.

[0047] Such as figure 1 As shown, a gate insulating layer 103, an oxide semiconductor layer 104, and a pixel electrode layer 105 are then deposited on the gate 102 in sequence. The material of the gate insulating layer 103 i...

no. 2 example

[0071] Figure 9 to Figure 11 This is the second embodiment of the present invention. The difference from the first embodiment is that the TFT device adopts an etching stop structure, that is, compared with the first embodiment, the oxide semiconductor layer 104 and the source electrode in the active layer region 201 111. An etch stopper layer (ESL) 115 is added between the drain electrode 112 to protect the semiconductor channel of the active layer from being damaged by the etching process of the source and drain metal layer. The process before the etching stop layer 115 is formed in this embodiment is the same as that of the first embodiment. For details, please refer to the description and description of the corresponding process in the first embodiment. Figure 1 to Figure 6 .

[0072] Before the etching stop layer 115 is formed, the oxide semiconductor layer 104 as the active layer is preferably subjected to etching damage repair treatment, such as adding O2 plasma treatment,...

no. 3 example

[0079] Figure 12 to Figure 18 This is the third embodiment of the present invention. The difference from the first embodiment lies in the process of semi-exposing the photoresist 106 coated on the pixel electrode layer 105 and the structure on the active layer.

[0080] Such as Picture 12 As shown, when the photoresist 106 is half-exposed, the half-exposed area changes from the entire active layer area 201 to the TFT back channel region, that is, only half exposure is performed on the TFT back channel region, which is equivalent to reducing the half exposure Area. In other words, the active layer region 201 can be divided into three sub-regions: the middle, the left and the right. The middle region corresponds to the TFT back channel region. In this embodiment, only the active layer region 201 is located in the middle. The photoresist 106 is half-exposed, and the photoresist 106 on the two sides (left and right) of the active layer region 201 is normally exposed (completely exp...

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Abstract

The invention relates to a method for manufacturing an oxide semiconductor thin film transistor array substrate. The method comprises the following steps of manufacturing a grid on a lining substrate; sequentially depositing on the grid to form a grid insulation layer, an oxide semiconductor layer and a pixel electrode layer; coating a photoresist on the pixel electrode layer, performing half exposure on a photoresist on an active source area, and enabling the thickness of the photoresist on the active source area to be smaller than the thickness of the photoresist on the pixel electrode area; etching to remove the pixel electrode layer and the oxide semiconductor layer outside the active layer area and the pixel electrode area; removing the photoresist on the active source layer; etching to remove the pixel electrode layer on the oxide semiconductor layer in the active layer area, and exposing the oxide semiconductor layer in the active layer area; removing the photoresist on the pixel electrode area; manufacturing a source and a drain on the oxide semiconductor layer in the active layer area; manufacturing a protecting layer on the source and the drain; manufacturing a common electrode layer on the protecting layer.

Description

Technical field [0001] The present invention relates to the field of display technology, in particular to a manufacturing method of an oxide semiconductor thin film transistor array substrate. Background technique [0002] Since amorphous silicon (a-Si) has problems such as low electron mobility caused by its own defects, its application in the display field has been limited. Oxide semiconductor thin film transistor (OS-TFT) refers to a thin film transistor in which the semiconductor channel is made of an oxide semiconductor. Because the oxide semiconductor has the characteristics of high electron mobility, low process temperature, and high light transmittance Therefore, it has become one of the research hotspots in the field of thin film transistor display. [0003] Liquid crystal displays have the advantages of good image quality, small size, light weight, low driving voltage, low power consumption, no radiation, and relatively low manufacturing costs. They currently dominate th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/77G03F7/00
CPCH01L27/1225H01L27/1288
Inventor 何佳新
Owner KUSN INFOVISION OPTOELECTRONICS
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