Semiconductor structure and method of forming same

Abstract

A semiconductor structure and a method of forming the same are disclosed. The method of forming the semiconductor structure comprises the steps of providing a semiconductor substrate comprising an NFET region and a PFET region, forming with a first fin portion and a second fin portion, the semiconductor substrate being provided with an isolation layer thereon, forming a dielectric layer on the isolation layer, the dielectric layer being provided internally with a first groove and a second groove, the first groove exposing the first pin portion partially and the isolation layer at the two sides of the first fin portion partially, and the second groove exposing partially the second fin portion and partially the isolation layer at the two sides of the second fin portion; forming a first interface layer on the surface of the first fin portion at the bottom of the first groove, and forming a second interface layer on the surface of the second fin portion at the bottom of the second groove; carrying out defect repair ion doping for the first interface layer; and after the defect repair ion implantation for the first interface layer, forming a first gate structure in the first groove, and forming a second gate structure in the second groove. The method can improve the performance of the formed substrate structure.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the continuous development of semiconductor process technology, process nodes are gradually reduced, and gate-last (gate-last) process has been widely used to obtain an ideal threshold voltage and improve device performance. However, when the feature size of the device is further reduced, even if the gate-last process is adopted, the structure of the conventional MOS field effect transistor can no longer meet the requirements for device performance, and the fin field effect transistor (FinFET) has been obtained as a multi-gate device. Widespread concern. [0003] In the prior art, wafers with crystal planes of (100) are generally used as semiconductor substrates for forming transistors, and wafers with crystal planes of (100) have a lower interface state density and fewer defects. ...

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Problems solved by technology

[0004] In the prior art, the switching rate of the N-type fin field effect transistor formed by using a semiconductor substrate with a (100) crystal plane is low, and the operating frequency is reduced, and the performance of the N-type fin field effect transistor needs to be further improved

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