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Convex block packaging method, semiconductor device and electronic device

A packaging method and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve problems such as photoresist collapse, short circuit of metal lines, and device reliability affecting process stability, etc. Problems, to achieve the effect of improving process stability and device yield, improving adhesion, reducing the risk of photoresist peeling and process defects

Inactive Publication Date: 2017-03-01
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

There is no simple and effective way to solve photoresist collapse in the current process
Moreover, since the photoresist is mostly coated on the surface of the metal / metal compound used as the seed layer, if the photoresist collapses, a short circuit will occur in the subsequent electroplating metal lines, which seriously affects the stability of the process. and device reliability

Method used

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  • Convex block packaging method, semiconductor device and electronic device
  • Convex block packaging method, semiconductor device and electronic device
  • Convex block packaging method, semiconductor device and electronic device

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Experimental program
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Embodiment 1

[0029] Combine below figure 2 The bump packaging method of the present invention will be described in detail.

[0030] Such as figure 2 As shown, first, step S201 is performed to provide a semiconductor substrate, and a copper seed layer is formed on the semiconductor substrate.

[0031] The substrate may be at least one of the following materials: silicon, germanium, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium on insulator (S-SiGeOI), insulator Silicon germanium on silicon (SiGeOI) and germanium on insulator (GeOI). In addition, other devices such as PMOS and NMOS transistors may be formed on the semiconductor substrate. An isolation structure may be formed in the semiconductor substrate, and the isolation structure is a shallow trench isolation (STI) structure or a local silicon oxide (LOCOS) isolation structure. CMOS devices may also be formed in the semiconductor substrate, and the CMOS devices are, for example, transistors (for example, NMOS ...

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Abstract

The invention provides a convex block packaging method, which comprises the steps of providing a semiconductor substrate, and forming a copper seed layer on the semiconductor substrate; performing preprocessing on the semiconductor substrate so as to form a rough surface on the copper seed layer; and coating the copper seed layer with a photoresist, and performing exposure and development. According to the convex block packaging method of a semiconductor device, preprocessing is formed on the metal / metal compound surface by using a photoresist etching liquid so as to form the rough surface, thereby improving an adhesive force of the photoresist on the metal / metal compound surface, reducing the falling risk of the photoresist and generation of a process defect, and improving the process stability and the device yield. The invention provides a semiconductor device packaged by adopting the method and an electronic device adopting the semiconductor device.

Description

Technical field [0001] The present invention relates to the field of semiconductor technology, in particular to a bump packaging method, a semiconductor device and an electronic device. Background technique [0002] With the development of portable and high-performance microelectronics products in the direction of short, small, light and thin, the traditional wire bonding method (Wire Bonding) as a packaging technology combining chips and various substrates can no longer meet the requirements of current consumer electronics products. Demand, instead of bump packaging has become the key technology of wafer level packaging. In the bump packaging process, electroplating is often used for rewiring or forming bumps. The more traditional processes are figure 1 As shown, first, step S101 is performed to form a layer of metal / metal compound seed layer on the surface of the wafer by physical vapor deposition (PVD), and then step S102 is performed to directly coat photoresist on the wafer,...

Claims

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Application Information

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IPC IPC(8): H01L21/48H01L23/488
CPCH01L21/4828H01L23/488
Inventor 郭喜俊潘英
Owner SEMICON MFG INT (SHANGHAI) CORP