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Low-temperature bonding method for semiconductor without oxide layer

A low-temperature bonding, semiconductor technology, used in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as photoelectric performance degradation, limiting carrier transport, and limiting the application of Ge/Si heterogeneous materials. And the effect of cost and low cost

Inactive Publication Date: 2018-09-25
XIAMEN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the direct bonding of Si wafers will introduce a layer of silicon oxide layer of about 5nm at the interface due to the hydrophilic reaction of hydroxyl group (-OH). Due to the existence of the oxide layer, the transport of carriers at the bonding interface will be greatly affected. Impact
On the other hand, for Ge / Si bonding, many research groups have used plasma surface treatment technology to achieve bonding at a low temperature of 300 °C. [9,10] , however, the action of oxygen atoms during the plasma treatment will form a layer of GeO on the Ge surface 2 At the same time, due to the hydrophilic reaction at the interface, an oxide layer will be introduced at the interface, which will greatly limit the application of Ge / Si heterogeneous materials in the field of optoelectronics
It is well known that the oxide layer in optoelectronic devices will affect the RC time constant of the device, resulting in a decrease in the 3dB bandwidth of the device, and the oxide layer will limit the transport of carriers at the bonding interface, resulting in a decrease in optoelectronic performance

Method used

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  • Low-temperature bonding method for semiconductor without oxide layer

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Experimental program
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Effect test

Embodiment 1

[0042] The equipment used is a TRP-450 composite film sputtering deposition system, and two DC targets and one RF target are placed in the growth chamber. The target material used is a high-purity Ge circular target material of 5N (above 99.999%). The used Si substrate material is a (100) N-type single crystal Si wafer, polished on one side, and has a resistivity of 1-5Ω·cm.

[0043] 1. Treatment of Si substrate materials

[0044] 1) Select a Si substrate with a crystal orientation of (100), and ultrasonically clean it with acetone, ethanol, and deionized water for 10 minutes respectively to remove particles and organic matter attached to the surface of the substrate;

[0045] 2) The Si sheet after the organic ultrasonic cleaning was first washed with H 2 SO 4 :H 2 o 2 = 4:1 solution was boiled for 10 minutes, rinsed with deionized water for 15 times, and then HF:H 2 Soak in O=1:20 solution for 2mim, rinse with deionized water for 15 times;

[0046] 3) Then use NH 4 OH...

Embodiment 2

[0055] The equipment used is a TRP-450 composite film sputtering deposition system, and two DC targets and one RF target are placed in the growth chamber. The target material used is a high-purity Ge circular target material of 5N (above 99.999%). The Si substrate material used is an N-type single crystal Si wafer with a crystal orientation of (100), polished on one side, and the resistivity is 1-5 Ω cm, and the Ge substrate material used is a P-type single crystal with a crystal orientation of (100). Ge wafer, polished on one side, resistivity 0.05Ω·cm.

[0056] 1. Treatment of Si and Ge substrate materials

[0057] 1) Select Si and Ge substrates with a crystal orientation of (100), and use acetone, ethanol, and deionized water to ultrasonically clean them for 10 minutes, respectively, to remove particles and organic matter attached to the surface of the substrate;

[0058] 2) The Si sheet after the organic ultrasonic cleaning was first washed with H 2 SO 4 :H 2 o 2 = 4...

Embodiment 3

[0069]The equipment used is a TRP-450 composite film sputtering deposition system, and two DC targets and one RF target are placed in the growth chamber. The target material used is a high-purity Ge circular target material of 5N (above 99.999%). The Si substrate material used is an N-type single crystal Si sheet with a crystal orientation of (100), polished on one side, with a resistivity of 1-5Ω cm, and the top layer is thermally oxidized SiO 2 The thickness of the substrate is 200nm, and the Ge substrate material used is a P-type single crystal Ge sheet with crystal orientation (100), polished on one side, and the resistivity is 0.05Ω·cm.

[0070] 1. SiO2 2 / Processing of Si and Ge substrate materials

[0071] 1) Select SiO with a crystal orientation of (100) 2 / Si and Ge substrates were ultrasonically cleaned with acetone, ethanol, and deionized water for 10 minutes, respectively, to remove particles and organic matter attached to the surface of the substrate;

[0072...

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Abstract

The invention relates to a low-temperature bonding method for a semiconductor without an oxide layer, which relates to a semiconductor bonding process. A transition layer technology is adopted, a thinGe layer is introduced at a Si, Ge and SiO2 semiconductor bonding interface, and the low-temperature crystallization characteristics and the crystallization atomic migration characteristics of the Gematerial are used to realize non-oxide layer Si wafer bonding, Ge / Si bonding and GOI bonding. The low-temperature crystallization characteristics of a magnetron sputtering Ge layer are used to realize a non-interfacial oxide layer semiconductor bonding interface, a semiconductor Ge transition layer grows on the surface of a wafer after being cleaned, the low-temperature crystallization characteristics of the Ge are used, crystallization of the Ge transition layer is realized through low-temperature annealing, migration of atoms at the bonding interface is thus driven, and the oxide layer is finally dissociated. According to the method in the invention, the problem of introducing a hydrophilic oxide layer at the interface during a direct hydrophilic bonding process can be solved, crystallization of the semiconductor bonding interface transition layer can also be realized under the low temperature of 300 to 400 DEG C, and atomic bond bonding is thus realized.

Description

technical field [0001] The invention relates to a semiconductor bonding process, in particular to a low-temperature bonding method for semiconductors without an oxide layer utilizing the low-temperature crystallization of materials and the migration characteristics of crystallized atoms. Background technique [0002] With the development of semiconductor technology, traditional material preparation technologies such as CVD and MBE have encountered many bottlenecks in recent years. Threading dislocations require cyclic thermal annealing at high temperature to reduce the threading dislocations of the material, but the threading dislocation density after annealing is still at 10 7 cm -2 Magnitude [1,2] At present, it is difficult to further reduce threading dislocations by simply optimizing the process parameters of epitaxy technology. Therefore, a new material preparation method is urgently needed to further reduce the threading dislocation density in the material. [0003]...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/50
Inventor 陈松岩柯少颖吴金庸李成黄巍
Owner XIAMEN UNIV
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