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A light-emitting diode epitaxial wafer and its manufacturing method

A technology for light-emitting diodes and a manufacturing method, which is applied to semiconductor devices, electrical components, circuits, etc., can solve the problems of lowering the crystal quality of the multi-quantum well layer, affecting the luminous efficiency of LEDs, destroying the multi-quantum well layer, etc., and increasing the concentration and quantity. , Reduce the precipitation of In and ensure the effect of luminous efficiency

Active Publication Date: 2020-06-02
HC SEMITEK SUZHOU
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] Growing a high-temperature P-type layer in a high-temperature environment will destroy the multi-quantum well layer, reduce the crystal quality of the multi-quantum well layer, and affect the luminous efficiency of the LED. Increasing the doping concentration of Mg in the high-temperature P-type layer will lead to high-temperature P The content of Mg in the type layer is high, which causes the self-compensation effect, which will lead to a decrease in the concentration of holes

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  • A light-emitting diode epitaxial wafer and its manufacturing method
  • A light-emitting diode epitaxial wafer and its manufacturing method

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Embodiment Construction

[0027] In order to make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be described in further detail below in conjunction with the accompanying drawings.

[0028] The embodiment of the present invention provides a method for manufacturing a light emitting diode epitaxial wafer, figure 1 It is a method flowchart of a method for manufacturing a light-emitting diode epitaxial wafer provided by an embodiment of the present invention, such as figure 1 As shown, the manufacturing method includes:

[0029] Step 101: Provide a substrate.

[0030] In this embodiment, the substrate is sapphire.

[0031] Step 101 may also include:

[0032] The temperature of the reaction chamber is controlled to 1050° C. and the pressure is 200 to 500 Torr. The sapphire substrate is annealed in a pure hydrogen atmosphere for 5 to 6 minutes, and then the sapphire substrate is nitridated.

[0033] In this embodiment, a Veeco K465i o...

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Abstract

The invention discloses an LED epitaxial wafer and a manufacturing method thereof, and belongs to the technical field of semiconductors. The manufacturing method comprises that a substrate is provided; a low-temperature buffer layer, a high-temperature buffer layer, an N type layer, a multi-quantum well layer and an electron barrier layer are grown on the substrate successively; and a high temperature P type layer is grown on the electron barrier layer, the high temperature P type layer comprises first and second sub-layers grown successively, the first sub-layer is doped with Mg and In, the second sub-layer is doped with Mg, the first sub-layer is grown in the low-temperature low-pressure condition, and the second sub-layer is grown on the first sub-layer in the high-temperature high-pressure growing condition. According to the manufacturing method, damage of the high-temperature P type layer on the multi-quantum well is reduced, sufficient cavities are provided, and the light emitting efficiency of an LED is ensured.

Description

Technical field [0001] The present invention relates to the field of semiconductor technology, in particular to a light emitting diode epitaxial wafer and a manufacturing method thereof. Background technique [0002] LED (Light Emitting Diode, light-emitting diode) is a semiconductor electronic component that can emit light. As a new type of high-efficiency, environmentally friendly, green solid-state lighting source, it is rapidly and widely used, such as traffic signal lights, automotive interior and exterior lights, urban landscape lighting, mobile phone backlights, etc. [0003] The epitaxial wafer is the main component of the LED. The existing GaN-based LED epitaxial wafer includes a substrate and a low-temperature buffer layer, a high-temperature buffer layer, an N-type layer, a multiple quantum well layer, an electron barrier layer and High temperature P-type layer. The high temperature P-type layer is doped with Mg to provide holes. In order to obtain a certain amount of...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L33/00H01L33/02H01L33/12H01L33/14
CPCH01L33/0066H01L33/02H01L33/12H01L33/145
Inventor 姚振从颖胡加辉李鹏
Owner HC SEMITEK SUZHOU