A method for improving the deposition characteristics of polysilicon thin films for Sonos memory

Abstract

The invention discloses a method for improving the polysilicon thin film deposition characteristics of a SONOS memory, comprising: step S1: providing a silicon-based substrate, and forming a SONOS area, a selection gate area, and a peripheral logic circuit area, and has formed a high-voltage gate oxide layer, In-situ ONO layer; step S2: etching and removing the blocking oxide layer of the in-situ ONO layer; step S3: depositing a first blocking oxide layer on the silicon nitride layer of the in-situ ONO layer by ISSG method; step S4: engraving Etching and removing the first blocking oxide layer and silicon nitride layer located at the select gate region and the peripheral logic circuit region; Step S5: Depositing a second blocking oxide layer on the first blocking oxide layer of the in-situ ONO layer by using ISSG method layer; step S6: polysilicon film deposition; step S7: polysilicon gate structure formation. The invention can not only guarantee the reliability requirements of SONOS memory, but also reduce wafer warpage, which is beneficial to the deposition of subsequent polysilicon thin films, thereby improving the alignment accuracy of the polysilicon gate structure photolithography process, greatly increasing the process window, and the invention The process is stable and controllable, suitable for mass production.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for improving the deposition characteristics of a polysilicon film of a SONOS memory. Background technique [0002] With the continuous improvement of market requirements for the integration of FLASH storage devices, the contradictions between the reliability of data storage of traditional Flash devices and the working speed, power consumption, and size of devices have become increasingly prominent. SONOS memory has the characteristics of small cell size, low operating voltage, and compatibility with CMOS technology. The continuous improvement of SONOS technology will promote the development of semiconductor memory in the direction of miniaturization, high performance, large capacity, and low cost. [0003] SONOS memory uses silicon substrate-tunnel oxide layer-silicon nitride-blocking oxide layer (blocking oxide)-polysilicon (Silicon-Oxide-Nitride-Ox...

AI Technical Summary

Problems solved by technology

[0006] The present invention is aimed at the prior art, the existing ISSG process temperature is higher, the oxidation time is longer, so that the warpage of the wafer becomes more serious, and in the subsequent polysilicon gate photolithography process, the depositi

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