Unlock instant, AI-driven research and patent intelligence for your innovation.

Method for preparing silicon oxide on silicon wafer surface

A silicon oxide, silicon wafer surface technology, used in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as difficult insulating layers, and achieve the effect of reducing reaction temperature and expanding application prospects

Inactive Publication Date: 2020-03-24
SHANGHAI JIAO TONG UNIV
View PDF5 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the electrochemical method at room temperature is difficult to achieve a controllable thickness of the insulating layer in the microchannel with a large aspect ratio.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for preparing silicon oxide on silicon wafer surface
  • Method for preparing silicon oxide on silicon wafer surface
  • Method for preparing silicon oxide on silicon wafer surface

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0036] See figure 1 In one embodiment, a method for preparing silicon oxide on the surface of a silicon wafer. The silicon wafer may be silicon, germanium, or other semiconductor substrates. The method includes:

[0037] A1: Preparation of porous silicon precursor on the surface of silicon wafer: Place the silicon wafer substrate in an etching solution containing ethanol and fluorine-containing reagents, with the silicon wafer substrate as the positive electrode and platinum wire as the negative electrode, and the reaction is carried out in a constant current mode , Forming a porous silicon film on the surface;

[0038] A2: Preparation of silicon dioxide film: the silicon wafer substrate and platinum wire obtained in step A1 are placed in an acid solution, with the silicon wafer substrate as the positive electrode and the platinum wire as the negative electrode, and the reaction is carried out in a constant pressure mode at room temperature ( The reaction time is 10 minutes), and a...

Embodiment 2

[0055] This embodiment relates to a method for preparing a silicon oxide insulating layer on the surface of a silicon wafer containing vertical through silicon holes. The aspect ratio of the microchannel selected in this embodiment is 1:5, and the resistivity is 10 -2 Ω; The specific steps are as follows:

[0056] Step 1): Use acetone, alcohol, and deionized water to ultrasonically clean the silicon wafers at 25°C. The cleaning time is 5 minutes, respectively, and then blow dry for later use;

[0057] Step 2): The corrosion solution is prepared as follows: First, add 250mL of 95% pure ethanol into a polytetrafluoroethylene container, and then add 50ml of 40% hydrofluoric acid solution under magnetic stirring, stir for 20 minutes and then let it stand. Obtain a clear solution. Then place the silicon wafers cleaned in step 1) with polyimide tape to cover the parts that do not need to be reacted, and place them in the configured etching solution together with the platinum wire, with t...

Embodiment 3

[0063] This embodiment relates to a method for preparing a silicon oxide insulating layer on the surface of a silicon wafer containing vertical through silicon holes. The aspect ratio of the microchannel selected in this embodiment is 1:10, and the resistivity is 20Ω. The specific steps are as follows:

[0064] Step 1): Under the condition of 25 degrees Celsius, use acetone, alcohol and deionized water to ultrasonically clean the silicon wafers, the cleaning time is 5 minutes, respectively, and then blow dry for use;

[0065] Step 2): The corrosion solution is prepared as follows: First, add 250mL of 95% pure ethanol into a polytetrafluoroethylene container, and then add 50ml of 40% hydrofluoric acid solution under magnetic stirring, stir for 20 minutes and then let it stand. Obtain a clear solution. Then place the silicon wafers cleaned in step 1) with polyimide tape to cover the parts that do not need to be reacted, and place them in the configured etching solution together with ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
Login to View More

Abstract

The invention discloses a method for preparing silicon oxide on the surface of a silicon wafer. The method comprises the following steps: A1, preparing a porous silicon precursor on the surface of a silicon wafer: putting a silicon wafer substrate into an etchant solution containing ethanol and a fluorine-containing reagent, reacting in a constant-current mode, and forming a porous silicon film onthe surface of the silicon wafer after the reaction; A2, preparing a silicon dioxide film, namely putting the sample obtained in the step A1 into an acid solution, and reacting for 10 minutes in a constant-pressure mode to obtain the silicon oxide film. According to the method, the silicon oxide film is prepared on the surface of the silicon wafer in situ at room temperature, the limitation thata traditional preparation method needs heating is improved, the preparation condition of the film is improved, and the method is particularly suitable for preparing the silicon dioxide insulating filmin the vertical silicon through hole.

Description

Technical field [0001] The invention relates to the preparation of an inorganic insulating layer on the surface of a silicon wafer, in particular to a method for preparing silicon oxide on the surface of a silicon wafer (containing vertical through holes). Background technique [0002] Silicon through-hole interconnection technology has a high integration density and relatively mature process conditions, and can be widely used in 3D packaging, and has become one of the most important packaging forms in the future. In the technology for preparing silicon wafer microchannel insulating layers, the existing insulating layers mainly include inorganic insulating layers such as silicon dioxide and silicon nitride and organic insulating layers. The inorganic insulating layer has the advantages of high breakdown voltage, low dielectric loss, high hardness, and wear resistance, and has great application prospects in silicon wafer manufacturing. However, the traditional thermal oxidation p...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768H01L21/02
CPCH01L21/02164H01L21/02258H01L21/76829
Inventor 段浩泽文紫妍李明
Owner SHANGHAI JIAO TONG UNIV