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Method for manufacturing hyperfine transistor by using thin film layer

An ultra-fine, thin-film layer technology, applied in nanotechnology for materials and surface science, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve the problems of difficult control of cost and quality, and achieve easy industrial production and simple operation , the effect of reducing production costs

Active Publication Date: 2020-09-04
WUHAN UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In addition, even if ultra-short channels can be prepared, the cost and quality are not easy to control

Method used

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  • Method for manufacturing hyperfine transistor by using thin film layer
  • Method for manufacturing hyperfine transistor by using thin film layer
  • Method for manufacturing hyperfine transistor by using thin film layer

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Embodiment Construction

[0040] For a better understanding of the present invention, the following examples are further descriptions of the present invention, but the content of the present invention is not limited to the following examples.

[0041] The transfer, etching, deposition methods, substrates and substrates involved in the present invention are all prior art, which do not belong to the innovation of the present invention, and are only used here. The etching method includes but not limited to oxygen plasma etching, hydrogen plasma etching and the like. Transfer includes but is not limited to dry transfer or wet transfer, etc. Deposition methods include but are not limited to atomic layer deposition, chemical vapor deposition, magnetron sputtering, electron beam deposition, pulsed laser deposition, physical vapor deposition, and the like.

[0042] (1) repeatedly cleaning the sapphire substrate 1 in acetone, alcohol, deionized water and drying with nitrogen;

[0043] (2) using physical vapor...

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Abstract

The invention belongs to the field of field effect transistors, and particularly relates to a method for manufacturing a hyperfine transistor by using a thin film layer. The method comprises the following steps of: sequentially depositing an Au thin film and a metal thin film on a substrate; carrying out annealing in inert gas; growing a two-dimensional material in vapor exposed to a chalcogen element; depositing another Au film; transferring the three layers of films to the surface of the flexible substrate, and cutting the films into slices; wrapping the slices with a polymer flexible material, curing the slices, and cutting slices into thin sheets; transferring the thin sheets to the surface of the substrate to form a metal electrode pair with an ultra-short interval; processing the metal electrode pair with the ultra-short spacing by using pulse laser; sequentially depositing a high-k gate dielectric material and a two-dimensional material on another substrate; and transferring theultra-short spacing metal electrode pair to the surface of the two-dimensional material to form the back gate electrode field effect transistor. The length of the nano-channel can be effectively regulated and controlled by controlling the thickness of the deposited film, operation is simple, and the length of the channel can be further reduced by utilizing laser to impact the metal electrode pairto deform the metal.

Description

technical field [0001] The invention belongs to the field of field effect transistors, and in particular relates to a method for manufacturing ultrafine transistors with a thin film layer. Background technique [0002] As the basis of modern electronic information technology, integrated circuit chips have the characteristics of strong functions, low power consumption, high speed and low cost. Mr. Gordon Moore once made a prediction on the development of the semiconductor industry, which is the famous Moore's Law. In the first few decades, the development of integrated circuits basically followed Moore's Law. The prerequisite for Moore's Law to take effect is that devices can continue to be miniaturized, that is, the channel length of devices continues to shrink. When the feature size of the device is continuously scaled down, the carriers hardly encounter scattering when transporting in the channel, which is called ballistic transport. Therefore, how to reduce the length ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/40H01L29/772H01L21/331B82Y30/00
CPCB82Y30/00H01L29/401H01L29/66409H01L29/772
Inventor 胡耀武黄正何亚丽
Owner WUHAN UNIV
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