Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Porcelain paste of wet process multilayer chip ceramic capacitor and preparation method thereof

A multi-layer chip, wet process technology, applied in the direction of laminated capacitors, capacitors, fixed capacitors, etc., can solve the problems of easy delamination of products, high cost of process equipment, narrow product series, etc. The risk of delamination and cracking, the improvement of shrinkage matching, the effect of less organic solvent content

Active Publication Date: 2022-06-21
CHINA ZHENHUA GRP XINYUN ELECTRONICS COMP ANDDEV CO LTD
View PDF11 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Multilayer chip ceramic capacitors are referred to as chip capacitors for short. The conventional manufacturing process is to stack the ceramic dielectric diaphragms with printed electrodes (internal electrodes) in a dislocation manner, and form a ceramic chip after one-time high-temperature sintering, and then on the chip. Both ends of the metal layer (external electrode) are sealed to form a structure similar to a monolith. This process is referred to as a dry process. The cost of process equipment for this process is relatively high (especially for highly integrated automatic intelligent equipment) , The dry process contains harmful solvents (toluene), there are many key quality control points before the green body is formed (not easy to control), and delamination is easy to occur during the green body debinding and sintering (especially for large-scale and high-thickness products). If the dry process is used Using porcelain slurry to make high-voltage and high-capacity multilayer ceramic chip capacitors, large pulse power ceramic capacitors and other special multilayer ceramic chip capacitors has problems such as high cost, relatively narrow product series, and easy delamination of products after debinding and sintering. , such as the patent document CN102653469B discloses a kind of chip multilayer ceramic capacitor dielectric slurry and dielectric preparation method

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Porcelain paste of wet process multilayer chip ceramic capacitor and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0020] 1. The composition of the ceramic paste of the multi-layer chip ceramic capacitor is calculated as: 85% of the ceramic powder, 1.5% of the organic additive, and 13.5% of the organic solvent.

[0021] Further, the organic additive is composed of a dispersant and a binder in a mass ratio of 3:2; wherein, the dispersant is formed by mixing phosphate ester and ethyl cellulose type A in a mass ratio of 6:4; The binder is composed of ethyl cellulose type B, ethyl cellulose type C, ethyl cellulose type D and polyvinyl butyral in a mass ratio of 1:1:1:4.

[0022] Further, the organic solvent is composed of solvent A type and solvent B type in a mass ratio of 1:1; wherein, solvent A type is formed by mixing terpinolene and cineol in a mass ratio of 1:5 ; Solvent B is made by mixing terpinolene and α-terpineol in a mass ratio of 1:6.

[0023] 2. A method for preparing a ceramic paste for a multilayer chip ceramic capacitor, comprising the following steps:

[0024] (1) Pre-dispe...

Embodiment 2

[0032] 1. The composition of the ceramic paste of the multi-layer chip ceramic capacitor is calculated as: 80% of ceramic powder, 2% of organic additives, and 18% of organic solvent.

[0033] Further, the organic additive is composed of a dispersant and a binder in a mass ratio of 3:2; wherein, the dispersant is formed by mixing phosphate ester and ethyl cellulose type A in a mass ratio of 6:4; The binder is composed of ethyl cellulose type B, ethyl cellulose type C, ethyl cellulose type D and polyvinyl butyral in a mass ratio of 1:1:1:4.

[0034] Further, the organic solvent is composed of solvent A type and solvent B type in a mass ratio of 1:1; wherein, solvent A type is formed by mixing terpinolene and cineol in a mass ratio of 1:5 ; Solvent B is made by mixing terpinolene and α-terpineol in a mass ratio of 1:6.

[0035] 2. A method for preparing a ceramic paste for a multilayer chip ceramic capacitor, comprising the following steps:

[0036] (1) Pre-dispersion: add an o...

Embodiment 3

[0043] 1. The composition of the ceramic paste of the multi-layer chip ceramic capacitor is calculated as: 77% of ceramic powder, 7% of organic additives, and 16% of organic solvent.

[0044]Further, the organic additive is composed of a dispersant and a binder in a mass ratio of 2:1; wherein, the dispersant is formed by mixing phosphate ester and ethyl cellulose type A in a mass ratio of 4:3; The binder is composed of ethyl cellulose type B, ethyl cellulose type C, ethyl cellulose type D, and polyvinyl butyral in a mass ratio of 1:1:1:3.

[0045] Further, the organic solvent is formed by mixing alcohol and toluene in a mass ratio of 1:1, and both alcohol and toluene are electronic grades.

[0046] 2. A method for preparing a ceramic paste for a multilayer chip ceramic capacitor, comprising the following steps:

[0047] (1) Pre-dispersion: add organic solvent, dispersant and porcelain powder into the mixing tank, and stir for 35 minutes at 200 rpm stirring speed to obtain pre...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention belongs to the technical field of multilayer chip ceramic capacitors, and in particular relates to a wet-process porcelain slurry of multilayer chip ceramic capacitors and a preparation method thereof; the slurry preparation process has a high degree of automation, high production efficiency, and a particle size of Uniform distribution and less bubbles enhance the dispersion uniformity and stability of the porcelain paste. The porcelain paste has a long storage time, less organic solvent content and low proportion, less pores during debinding, and the dielectric film of the porcelain paste and the inner electrode shrink during sintering. The ratio is relatively small, which improves the shrinkage matching of sintering debinding and reduces the risk of delamination cracking.

Description

technical field [0001] The invention belongs to the technical field of multilayer chip ceramic capacitors, in particular to a ceramic paste for a wet process multilayer chip ceramic capacitor and a preparation method thereof. Background technique [0002] With the rapid development of some special fields in China, such as electromagnetic pulse weapons, electromagnetic rail guns, oil exploration and other fields. Multilayer chip ceramic capacitors are referred to as chip capacitors. The conventional manufacturing process is to stack the ceramic dielectric diaphragms with printed electrodes (inner electrodes) in a dislocation manner, and form a ceramic chip after one-time high-temperature sintering. Metal layers (external electrodes) are sealed on both ends of the filament to form a monolith-like structure. This process is referred to as dry process. The process equipment cost of this process is relatively high (especially for highly integrated automatic intelligent equipment)...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): C04B35/626C04B35/622C04B35/632C04B35/636C04B35/634H01G4/12H01G4/30
CPCC04B35/62635C04B35/6264C04B35/62222C04B35/6261C04B35/632C04B35/6365C04B35/6342H01G4/1209H01G4/30C04B2235/95
Inventor 穆超廖朝俊黄必相黄洪喜杨凯张小枫曾庆毅万奕张国荣
Owner CHINA ZHENHUA GRP XINYUN ELECTRONICS COMP ANDDEV CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products