Solar cell and manufacturing method thereof
A solar cell and manufacturing method technology, applied in circuits, photovoltaic power generation, electrical components, etc., can solve the problems of poor electrical conductivity, affecting the conversion efficiency of solar cells, large contact resistance, etc.
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Embodiment 1
[0075]The manufacturing method of the n-type silicon heterojunction solar cell provided in this embodiment is specifically as follows:
[0076]The first step is to provide an n-type crystalline silicon wafer. The n-type crystalline silicon wafer is sequentially polished, textured and cleaned to form an n-type crystalline silicon wafer with a textured surface.
[0077]In the second step, a PECVD process is used to deposit a first intrinsic amorphous silicon layer on the front side of the n-type crystalline silicon wafer, and a second intrinsic amorphous silicon layer on the back side of the n-type crystalline silicon wafer.
[0078]In the third step, a PECVD process is used to deposit an n-type doped amorphous silicon layer on the first intrinsic amorphous silicon layer.
[0079]In the fourth step, a PECVD process is used to deposit a p-type doped amorphous silicon layer on the second intrinsic amorphous silicon layer.
[0080]In the fifth step, a first transparent conductive film (with a thickness...
Embodiment 2
[0087]The manufacturing method of the n-type silicon heterojunction solar cell provided in this embodiment is specifically as follows:
[0088]The first step is to provide an n-type crystalline silicon wafer. The n-type crystalline silicon wafer is sequentially polished, textured and cleaned to form an n-type crystalline silicon wafer with a textured surface.
[0089]In the second step, a PECVD process is used to deposit a first intrinsic amorphous silicon layer on the front side of the n-type crystalline silicon wafer, and a second intrinsic amorphous silicon layer on the back side of the n-type crystalline silicon wafer.
[0090]In the third step, a PECVD process is used to deposit an n-type doped amorphous silicon layer on the first intrinsic amorphous silicon layer.
[0091]In the fourth step, a PECVD process is used to deposit a p-type doped amorphous silicon layer on the second intrinsic amorphous silicon layer.
[0092]In the fifth step, a first transparent conductive film (with a thickness...
Embodiment 3
[0099]The manufacturing method of the n-type silicon heterojunction solar cell provided in this embodiment is specifically as follows:
[0100]The first step is to provide an n-type crystalline silicon wafer. The n-type crystalline silicon wafer is sequentially polished, textured and cleaned to form an n-type crystalline silicon wafer with a textured surface.
[0101]In the second step, a PECVD process is used to deposit a first intrinsic amorphous silicon layer on the front side of the n-type crystalline silicon wafer, and a second intrinsic amorphous silicon layer on the back side of the n-type crystalline silicon wafer.
[0102]In the third step, a PECVD process is used to deposit an n-type doped amorphous silicon layer on the first intrinsic amorphous silicon layer.
[0103]In the fourth step, a PECVD process is used to deposit a p-type doped amorphous silicon layer on the second intrinsic amorphous silicon layer.
[0104]In the fifth step, a first transparent conductive film (with a thickness...
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