A kind of wafer-level test probe card and wafer-level test probe card assembly method

Abstract

A wafer-level test probe card and a wafer-level test probe card assembly method of the present invention belong to the technical field of probe cards and wafer testing; the wafer-level test probe card includes a PCB board, a signal adapter board and a probe card. needle, also includes interposer group, guide plate group and spacer group; described interposer group includes top interposer, bottom interposer and low power consumption interposer, and described probe includes power supply probe, ground probe, There are four kinds of low-frequency signal probes and high-frequency signal probes, which are respectively connected to the signal adapter board and the interposer board group; the assembly method of the wafer-level test probe card uses this to perform the following steps: align the pinholes, place the pins, probe Needle limit and PCB connection; the present invention provides sufficient accommodation space for signal decoupling, anti-interference, noise reduction and other processing circuits through grouping of probes, which can isolate or reduce the coupling and interference between different signal probes, and improve the reliability of the system. The overall test performance, especially, can improve the high frequency test capability of the system.

Description

technical field [0001] The invention discloses a wafer-level test probe card and a method for assembling the wafer-level test probe card, belonging to the technical field of probe cards and wafer testing. Background technique [0002] Wafer testing is to detect the electrical characteristics of each die on the wafer, eliminate unqualified die early or optimize product design, and avoid cost waste caused by packaging of defective products. The probe card is a test device used for wafer inspection. By transmitting the test signal of the test machine to the object under test, and sending the response signal of the object under test back to the test machine through itself, the performance of the chip can be optimized. Testing, in conjunction with other testing and analysis instruments, can realize a complete test of the pros and cons of chips and performance, realize the screening of defective products, and reduce unnecessary packaging costs. [0003] During the test, the test ...

AI Technical Summary

Problems solved by technology

With the continuous development of semiconductor technology and the continuous increase of chip operating frequency, problems such as power integrity problems, ground bounce problems, unequal ground potentials, and excessive signal insertion loss have more and more impacts on the test performance of probe cards. Large; as the density of pads on the wafer continues to increase, all types of probes are connected to the substrate, resulting in a small remaining space on the substrate, making it difficult to distribute processing devices and circuits such as power decoupling, signal noise reduction filtering, and impedance matching. , the probes carrying different signals will interfere with each other, affecting the overall test results

[0004] Taking noise filtering as an example, the patent CB105510649A provides a technical means to filter out signal noise by distributing capacitance on the edge of the substrate to solve the problem that the wiring substrate is difficult to ensure enough capacitor placement space

However, this method can only partially solve the problem, and since the capacitance is distributed on the edge of the signal substrate and is relatively far away from the signal pin, there is still room for further improvement in the noise filtering effect

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