Preparation method of glass substrate chip, glass substrate chip and application
A glass substrate and chip technology, which is applied in the field of glass substrate chips and applications, and the preparation of glass substrate chips, can solve the problems of clogging of reaction liquid, unfavorable fluid formation of laminar flow, insufficient smoothness and smoothness, etc. Small, conducive to market promotion and application, the effect of smooth and smooth flow channel
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[0049] Please refer to figure 1 , the embodiment of the present invention provides a method for preparing a glass substrate chip, which is an optimized process based on hard mask layer, multiple etching and surface modification of the flow channel, which can produce the difference between the depth of the microreactor and the depth of the flow channel in and out. A glass substrate chip with a smooth flow path and low roughness of less than 3um. Specifically include the following steps:
[0050] S1, pre-processing
[0051]Before depositing the hard mask layer 20, the base substrate 10 is cleaned to make the substrate clean and free of impurities. The base substrate 10 may be a general glass substrate or other types of substrates, which is not limited here.
[0052] Specifically, the glass substrate is selected from at least one of quartz glass, fused silica, borosilicate glass, silicate glass, alkali-free glass and soda-lime glass, and may be a single material or a composite...
Embodiment 1
[0072] This embodiment provides a method for preparing a glass substrate chip, using such as figure 1 The shown process route comprises the following steps:
[0073] (1) The quartz glass is used as the substrate for deep cleaning. First soak it with a mixed solution of sulfuric acid and hydrogen peroxide (the volume fraction of concentrated sulfuric acid is 50%) for 30 minutes, then soak it with acetone for 30 minutes, and finally rinse it with deionized water.
[0074] (2) A hard mask layer is formed on the surface of the glass substrate by using chromium oxide by magnetron sputtering, and the thickness is controlled to be 200nm.
[0075] (3) Coating positive photoresist photoresist on the surface of the hard mask layer, the thickness is controlled to be 300nm, and through exposure, the figure 2 The mask runner pattern shown is transferred to photoresist.
[0076] (4) Corrode the hard mask layer with a chromium etching solution (the volume ratio of cerium ammonium nitrate ...
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