Check patentability & draft patents in minutes with Patsnap Eureka AI!

Radiation-hardened LDMOS (Laterally Diffused Metal Oxide Semiconductor) device structure and preparation method

A device structure and radiation hardening technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as device failure, achieve the effects of reducing on-resistance, avoiding opening, and suppressing device burnout

Pending Publication Date: 2022-04-08
58TH RES INST OF CETC
View PDF0 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] The purpose of the present invention is to provide a radiation-hardened LDMOS device structure and preparation method to solve the problem of device failure caused by the total dose radiation effect and single event radiation effect of the device

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Radiation-hardened LDMOS (Laterally Diffused Metal Oxide Semiconductor) device structure and preparation method
  • Radiation-hardened LDMOS (Laterally Diffused Metal Oxide Semiconductor) device structure and preparation method
  • Radiation-hardened LDMOS (Laterally Diffused Metal Oxide Semiconductor) device structure and preparation method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0048] The present invention provides a radiation hardened LDMOS device structure whose cross section is as figure 1 As shown, it includes P-type silicon substrate 1, N-type buried layer 2, P-epitaxy layer 3, P-body region 4, N-drift region 5, Psink heavily doped region 6, N+ heavily doped region 7, P+ A heavily doped region 8, an STI region 9, and a polycrystalline gate region 10; the N-type buried layer 2 is located above the P-type silicon substrate 1, and the P-epitaxial layer 3 is located on the N-type buried layer 2 above; P-body region 4, N-drift region 5, Psink heavily doped region 6, N+ heavily doped region 7, P+ heavily doped region 8, and STI region 9 are located in the P-epitaxial layer 3; The polycrystalline gate region 10 is located on the outer surface of the P- epitaxial layer 3 .

[0049] read on figure 1 , both the P-body region 4 and the N-drift region 5 have an N+ heavily doped region 7, the N+ heavily doped region 7 in the P-body region 4 is a source, an...

Embodiment 2

[0054] The present invention also provides a method for preparing a radiation-hardened LDMOS device structure, which is used to prepare such as figure 1 and as figure 2 The radiation-hardened LDMOS device structure shown, the method comprises the steps of:

[0055] like image 3 As shown, a P-type silicon substrate is provided, phosphorus ions are implanted on its surface by a high-energy ion implanter, annealed to form an N-type buried layer, and a P- epitaxial layer is grown on the surface of the N-type buried layer;

[0056] like Figure 4 As shown, an oxidation is performed on the P- epitaxial layer to form a thin oxide buffer layer, and then silicon nitride is deposited to form a hard mask layer;

[0057] like Figure 5 As shown, the surface is coated with photoresist, and the hard mask layer, thin oxide buffer layer and P- epitaxial layer are sequentially etched to complete STI shallow trench isolation and form an active region;

[0058] like Image 6 As shown, th...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
Spacingaaaaaaaaaa
Horizontal widthaaaaaaaaaa
Thicknessaaaaaaaaaa
Login to View More

Abstract

The invention discloses a radiation-hardened LDMOS (Laterally Diffused Metal Oxide Semiconductor) device structure and a preparation method, and belongs to the field of integrated circuits, the radiation-hardened LDMOS device structure comprises a P-type silicon substrate, an N-type buried layer, a P-epitaxial layer, a P-body region, an N-drift region, a Psink heavily doped region, an N + heavily doped region, a P + heavily doped region, an STI (Shallow Trench Isolation) region and a polycrystalline gate region. An electric leakage channel between the drain electrode and the source electrode is cut off by using the polycrystalline gate region, so that the total dose radiation resistance of the device is improved; in the structure, an N-type buried layer is located between a P-type silicon substrate and a P-epitaxial layer, so that potential isolation is formed for the device, and high-side application of the device is realized; a Psink heavily doped region is added at the position of a P-body region, meanwhile, the injection depth of heavily doping is improved, the path length and resistivity of non-equilibrium carriers flowing through the P-body region are reduced, and the single particle radiation resistance of the device is improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a radiation-hardened LDMOS device structure and a preparation method. Background technique [0002] BCD process technology is an innovative integrated circuit process technology invented by SGS Thomson in the mid-1980s. The BCD process technology integrates different devices such as bipolar (Bipolar) devices with precise analog functions, digitally designed CMOS devices and DMOS devices with high-voltage and high-power structures on the same chip. The analog circuit serves as the interface between the outside world and the digital system, the CMOS logic circuit serves as the heart of the signal processing, and the high voltage / power section is used to drive the external load. [0003] LDMOS is widely used because it is easier to be compatible with CMOS process. LDMOS is a power device with double diffusion structure. This technique involves two implants in the same ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L29/78H01L29/423H01L29/06H01L21/336
Inventor 谢儒彬
Owner 58TH RES INST OF CETC
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com