Radio frequency SIO power NMOSFET with stepped grid oxidized layer and manufacturing method thereof
A technology of gate oxide layer and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, transistors, electrical components, etc., can solve problems such as poor repeatability and reliability, low reverse breakdown voltage, and incompatibility with mainstream processes, and achieve The effect of low production cost, high reliability and good application value
Active Publication Date: 2007-03-07
长电科技管理有限公司
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Problems solved by technology
The structure of RF SOI power NMOSFET applied to the mass production of integrated circuits has a series of problems such as incompatibility with mainstream processes, poor repeatability and reliability, high production costs, and low reverse breakdown voltage.
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[0023] The invention provides a radio frequency SOI power NMOSFET with stepped gate oxide layer realized by using CMOS SOI technology and a manufacturing method thereof. Its structure is shown in Figure 1. It is a radio frequency SOI power NMOSFET manufactured on a P-type SOI substrate. It is characterized in that it has a stepped gate oxide layer. Its structure is as follows from bottom to top: P-type silicon substrate layer 1, silicon dioxide Buried layer 2, thin silicon film layer 3, stepped gate oxide layer 4 and stepped gate polysilicon layer 5.
[0024] The thin silicon film layer 3 has a peripheral local field oxide region 34, a middle P-type well region 31 and a N + Type source region 32, N + type drain region 33, N + Type source region 32 and N + The drain region 33 is placed in the P-type well region 31 .
[0025] The stepped gate oxide layer 4 is placed on the upper surface of the middle P-type well region 31 of the thin silicon film layer 3 . The stepped gate ...
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RF SOI power NMOSFET with stepped grid oxidation layer is manufactured by: forming multiple layers, which is upward arranged in an order, i.e., a P type substrate, a silicon dioxide embedded layer, a thin silicon layer, a stepped grid oxidation layer, and a stepped grid poly-crystal layer. The thin silicon layer is patterned to form a peripheral local field oxidized zone, a central P type well zone, and N+ source and drain zones. Then, the steps are sequentially carried out: choosing a P type SOI substrate, making a P type well zone, a local field oxidized zone, a stepped grid oxidation layer, a stepped grid poly-crystal layer, treating the stepped grid poly-crystal layer, producing the N+ source and drain zones, wiring the electrodes and forming ohm contact and protection. The manufacture has advantages in fields of materials, process, reliability, repeatable ability, production cost, and reverse-breakdown voltage.
Description
Technical field: [0001] The invention relates to a radio frequency SOI power NMOSFET with a stepped gate oxide layer and a manufacturing method thereof. It belongs to the technical field of microelectronic device manufacturing. Background technique: [0002] RF power NMOSFETs fabricated on bulk silicon substrates are increasingly constrained and limited by the following parasitic effects: the thickness of silicon wafers for bulk silicon NMOSFETs is about 500 μm, but only about 1 μm of the top layer of the silicon wafer is used to make devices, devices and The interaction of the substrate causes a series of parasitic effects, one of which is the parasitic capacitance between the source and drain diffusion regions and the substrate. This capacitance increases with the increase of the doping concentration of the substrate. In RF NMOSFET, The substrate doping concentration is higher than that of a conventional NMOSFET, and therefore, this parasitic capacitance becomes larger. ...
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IPC IPC(8): H01L29/786H01L21/336
Inventor 王新潮廖小平
Owner 长电科技管理有限公司