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Manufacturing method of nano-line on semiconductor material

A manufacturing method and nanowire technology, applied in the field of micron and nanometers, can solve the problems of high manufacturing cost, unfavorable mass production, etc., and achieve the effects of low processing cost, reduced difficulty, and wide application prospect.

Inactive Publication Date: 2007-07-11
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage of this type of method is that the production cost is expensive, and it is not conducive to mass production.

Method used

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  • Manufacturing method of nano-line on semiconductor material
  • Manufacturing method of nano-line on semiconductor material
  • Manufacturing method of nano-line on semiconductor material

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0041] Embodiment 1: Utilize (100) SOI silicon chip of the top layer silicon to make isosceles trapezoidal cross-section nano-silicon beam (Fig. 2)

[0042] Select an SOI silicon wafer, the top dielectric 1 is a single crystal silicon surface with a crystal orientation, the composition of the intermediate dielectric 2 is silicon oxide, the composition of the substrate 3 is silicon, the composition of the protective film 4 is silicon nitride, and the composition of the protective film 6 The composition is silicon oxide, and silicon nanowires 9 on the intermediate medium 2 are fabricated. Then dilute hydrofluoric acid is used to hollow out the middle medium 2 above and below the top layer medium 1 to become nano-silicon beams in the air. The specific manufacturing process of the device is as follows:

[0043] (1) (100) crystalline SOI material, the thickness of the single crystal silicon top layer dielectric 1 is less than 300nm, and silicon nitride is deposited after cleaning t...

Embodiment 2

[0050] Embodiment 2: Utilize (100) the SOI silicon chip of the top layer silicon to make approximate rectangular cross-section nano-silicon beam embodiment 1 and make the following changes (step numbering is the same as embodiment 1, step (2) in embodiment 1 ( 3) (6) make following changes successively, all the other are identical with embodiment 1):

[0051] (2) Photoetching the silicon nitride protective film 4 with the boundary lines along the direction, as shown in FIG. 3( a ).

[0052] (3) Use silicon anisotropic etching solution (such as potassium hydroxide or tetramethylammonium hydroxide solution, etc.) to etch the silicon top layer medium 1 to the silicon oxide intermediate medium 2, because the etching rate of the etching solution is the same downward and lateral (The corrosion surfaces are all (100) planes), so an approximately vertical front sidewall 5 is formed, and the height of the front sidewall 5 is the thickness of the silicon top dielectric 1, as shown in F...

Embodiment 3

[0054] Embodiment 3: Utilize (110) top-layer silicon SOI silicon chip to make approximately rectangular cross-section nano-silicon beam. Change as follows, the rest are the same as in Example 1:

[0055] (2) Photoetching the silicon nitride protective film 4, and the boundary line is along the crystal direction, as shown in FIG. 4( a ).

[0056] (3) Utilize an anisotropic etching solution of silicon (such as potassium hydroxide or tetramethylammonium hydroxide solution, etc.) to etch the silicon top layer medium 1 to the silicon oxide intermediate medium 2, and a (111) slow corrosion surface perpendicular to the bottom surface appears, A vertical front side wall 5 is formed, as shown in Fig. 4(b).

[0057] (6) Use an anisotropic etching solution of silicon (such as potassium hydroxide or tetramethylammonium hydroxide solution, etc.) to etch the silicon top layer dielectric 1 that is not covered by the silicon oxide front sidewall 5 and the bird's beak 7 to form a vertical re...

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Abstract

The invention relates to a manufacturing method based on semi-conductor material nanometer line. It uses bird nozzle effect in semi-conductor process and wet corrosion or dry etching technology of the semi-conductor to produce lines with nanometer scale, it likes the rectangular or ladder cross section, and it can form protection film on the surface of the top media, carries on adulteration of boron, and phosphor. The method includes (1) using the SOI silicon plate on (100) or (110) crystal surface top; (2) using the SOI silicon plate and isotropy or wet / dry etching and corrosion technologies; (3) using the dry etching technology, then using the isotropy or anisotropy to corrode; (4) using the isotropy corrosion technology of the silicon, then using the dry etching technology to produce.

Description

technical field [0001] The invention relates to a method for manufacturing a nanometer-scale single crystal silicon wire, specifically, a method for making a wire on a dielectric layer by using the "bird's beak" effect in the semiconductor process and the wet etching or dry etching technology of semiconductor materials. A method for processing nanowires on semiconductor materials. It belongs to the field of micro-nano technology. Background technique [0002] Driven by the wave of high integration, the demand for nanoscale functional devices in modern technology will become more and more urgent. One-dimensional materials such as nanowires and nanotubes, as essential functional components in nanodevices, are becoming more and more important in the field of nanoscale research. [0003] In addition, in the past ten years, in the field of condensed matter physics, people have shown great interest in the study of low-dimensional and small-scale materials. Nanostructure is a ve...

Claims

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Application Information

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IPC IPC(8): H01L21/308H01L21/467
Inventor 向民刘文平王跃林
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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