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Thin film transistor and its producing method

A technology of thin film transistors and manufacturing methods, applied in the field of active matrix organic electroluminescent display devices

Inactive Publication Date: 2003-01-01
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, this dispersion becomes a big problem in an image display device in which a plurality of fine TFTs are arranged on one substrate.

Method used

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  • Thin film transistor and its producing method
  • Thin film transistor and its producing method
  • Thin film transistor and its producing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0076] (a1) First, by plasma CVD or decompression CVD, the SiO on the glass substrate 1 2 An amorphous silicon layer (a-Si layer) 3 with a thickness of 50 nm is formed on the layer (undercoat layer) 2, and dehydrogenation treatment is performed at a temperature of 450° C. under a nitrogen atmosphere ( Figure 2A ).

[0077] (b1) Next, by laser annealing using an excimer laser using XeCl, KrF, etc. as an excitation gas, molten crystallization (polysilicon) of the a-Si layer 3 is performed, and photolithography and etching are performed to form islands at predetermined positions. Shaped polysilicon layer (p-Si layer) 4 ( Figure 2B ).

[0078] (c1) Next, form SiO with a thickness of 100nm 2 layer, as the gate insulating layer 5, covering the p-Si layer 4 ( Figure 2C ).

[0079] (d1) Afterwards, the MoW alloy is formed into a film with a thickness of about 400-500 nm by sputtering, etc., and the MoW alloy layer is formed by photolithography and corrosion, as the gate 6 ( ...

Embodiment 2

[0094] In this embodiment, first, the same as in embodiment 1, (a1)-(e1) (refer to figure 1 ,2).

[0095] (f2) Next, a photoresist mask 30 having openings on the surface of the region consisting of the source region and the drain region is formed, and secondary doping is performed. A photoresist 30 is formed to cover the gate 6 . For example, by taking a dose of 1 x 10 14 piece / cm 2 Phosphorus ions are implanted for doping. Thus, at the same time as the channel region 7 is formed, the LDD regions 9a, 9b, the source region 10, and the drain region 11 ( Figure 3A ).

[0096] (g2) Next, metal ions (titanium ions) are implanted without removing the resist mask 30 . When titanium ions are implanted in this way, titanium ions are implanted into the same region as that into which impurity ions are secondarily introduced (the region constituted by the source region and the drain region). Also can use other metal ions such as cobalt, nickel to replace titanium ion ( Figure 3...

Embodiment 3

[0102] (a3) First, the SiO on the glass substrate 1 2 On the layer (undercoat layer) 2, island-shaped metal layers (titanium films) 12a, 12b with a thickness of 20nm are formed by sputtering at positions corresponding to source and drain regions to be formed later. Here, other metal layers such as cobalt and nickel can also be used instead of the titanium film ( Figure 4A ).

[0103] (b3) Next, form an amorphous silicon layer (a-Si layer) 3 with a thickness of 50 nm on the metal layer (titanium film) 2 by plasma CVD or decompression CVD, and heat it at 450 degrees under a nitrogen atmosphere. temperature for dehydrogenation ( Figure 4B ).

[0104] (c3) Next, by laser annealing using an excimer laser using XeCl, KrF, etc. as an excitation gas, molten crystallization (polysilicon) of the a-Si layer 3 is performed, and photolithography and etching are performed to form an island-shaped polysilicon layer ( p-Si layer)4( Figure 4C ).

[0105] After (d3), SiO with a thickne...

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Abstract

The invention provides a method for carrying out a heat treatment required during the manufacture of a thin film transistor (TFT) at relatively low temperatures. In this method, in a heating step in which at least a portion of a silicon-based semiconductor layer is crystallized, a silicide is formed in a source region and a drain region in the semiconductor layer. A TFT according to the invention includes a silicon-based semiconductor layer having a channel region, a source region and a drain region being so disposed as to sandwich the channel region, a source electrode electrically connected to the source region, a drain electrode electrically connected to the drain region, and a gate electrode insulated from the source electrode and the drain electrode, and the source region and the drain region contains a silicide.

Description

technical field [0001] The present invention relates to a thin film transistor and its manufacturing method, array substrate and image display device using the thin film transistor, such as active matrix liquid crystal display device and active matrix organic electroluminescence (EL) display device. Background technique [0002] Conventionally, thin film transistors (TFTs) in which polysilicon (polysilicon) is used as a semiconductor layer are often used as pixel switching elements such as liquid crystal display devices. [0003] Figure 14 A typical structure of a polysilicon TFT is shown. In this TFT, an undercoat layer 82 is formed on a glass substrate 81, and a polysilicon semiconductor layer 83 is formed at a predetermined position on the surface of the layer. The semiconductor layer 83 includes a channel region 84 , a source region 85 and a drain region 86 configured to sandwich this region. LDD (Lightly Doped Drain) regions 87a, 87b are interposed between the channe...

Claims

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Application Information

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IPC IPC(8): H01L21/336H01L27/32H01L29/45H01L29/786
CPCH01L29/66757H01L29/78684H01L29/78621H01L27/3244H01L29/458H10K59/12H01L29/786
Inventor 诸泽成浩
Owner PANASONIC CORP
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