Compound semiconductor device and manufacturing method thereof

Abstract

A pad electrode of a high electron mobility transistor is formed solely of a pad metal layer without providing a gate metal layer. A high concentration impurity region is provided below the pad electrode, and the pad electrode is directly contacted to a substrate. Predetermined isolation is ensured by the high concentration impurity region. Accordingly, in a structure not requiring a nitride film as similar to the conventional art, it is possible to avoid defects upon wire boding attributing to hardening of the gate metal layer. Therefore, even in the case of a buried gate electrode structure for enhancing characteristics of the high electron mobility transistor, it is possible to enhance reliability and yields.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a compound semiconductor device and a manufacturing method of the same, particularly, to a compound semiconductor device and a manufacturing method of the same which are capable of enhancing characteristics of field effect transistors and reducing defects in wire bonding. [0003] 2. Background Art [0004] Mobile communication devices such as mobile telephones often use microwaves in a gigahertz range and frequently use switching devices to switch antennas or transmitting / receiving for switching those high frequency signals (see Japanese Patent Application Publication No. Hei 9-181642, for example). Such devices often use field effect transistors (hereinafter referred to as FETs) using gallium arsenide (GaAs) to deal with microwave signals. In this concern, development of monolithic microwave integrated circuits (MMICs) configured to integrate the above-mentioned switching circuits are ...

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Benefits of technology

[0135] In the first place, the pad electrode is formed solely by use of the pad metal layer instead of disposing the gate metal layer at the pad electrode portion. Therefore, in the case of a buried gate electrode structure, it is possible to prevent defects at the time of wire bonding of the pad electrode. Conventionally, the gate metal layer has been provided below the pad electrode. For this reason, part of the gate metal layer below the pad electrode has been buried and hardened, thereby leading to numerous defects at the time of wire bonding. However, according to the embodiment of the present invention, it is possible to avoid such defects and to enhance yields and reliability.

[0022] As described above, the high concentration impurity regions 60 are provided below the pad electrode 91 and 92 and below the gate wiring 62 so as to protrude out of these regions. In this way, it is possible to suppress depletion layers extending from the pad electrodes 91 and 92 and the gate wiring 62 toward the substrate. Therefore, sufficient isolation can be ensured even when the pad electrodes 91 and 92 and the gate wiring 62 are provided directly on the GaAs substrate. Accordingly, it is possible to remove the nitride film which has been conventionally provided for the purpose of insulation.

[0137] In the third place, the high concentration impurity region may be separated from the pad electrode and provided in the substrate around the pad electrode. Accordingly, even in the structure configured to contact the pad electrode solely made of the pad metal layer directly to the substrate, it is possible to ensure isolation by small spaces between the respective formation elements.

[0028] The present invention also provides a method of manufacturing a compound semiconductor device that includes providing a compound semiconductor substrate, forming a stack of semiconductor layers on the substrate, forming a conducting region and an operating region in the stack, forming a gate electrode made of a first metal on the operating region, forming a pad electrode made of a second metal so that the second metal is in contact with the stack, the pad electrode being adjacent the conducting region, and bonding a bonding wire to the pad electrode.

[0139] In the fifth place, it is possible to form the FET having the buried gate electrode without disposing the gate metal layer, which is hardened by being buried below the pad electrode. Therefore, it is possible to provide the method of manufacturing a compound semiconductor device capable of enhancing characteristics of the FET and furthermore suppressing defects at the time of bonding.

[0140] In the sixth place, since the high concentration impurity region is formed in the substrate below the pad electrode, it is possible to provide the method of manufacturing a compound semiconductor device capable of suppressing a depletion layer which extends from the pad electrode and enhancing isolation.

[0141] In the seventh place, the high concentration impurity region may be separated from the pad electrode and provided in the surface of the substrate around the pad electrode. Accordingly, even in the structure configured to contact the pad electrode solely made of the pad metal layer directly to the substrate, it is possible to realize the method of manufacturing a compound semiconductor device capable of ensuring isolation by small spaces between the respective formation elements.

[0142] In the eighth place, it is possible to realize a buried gate electrode structure having fine FET characteristics only by modifying a mask pattern to be used in a photoresist process for the gate metal layer, and further to avoid defects at the time of wire bonding. Therefore, it is possible to enhance reliability and to improve yields without increasing the number of processes.

[0143] In the ninth place, by forming the FET as a HEMT by growing a buffer layer, an electron supply layer, an electron transmitting layer, a barrier layer, and a cap layer, it is possible to achieve substantially lower ON resistance value as compared to a usual GaAs FET.

[0053] By forming the buried gate electrode, an edge on the drain side of a cross section of the gate electrode 69 is formed into a round shape (and an edge on the source side as well), and electric field strength between the gate electrode and the drain electrode can be reduced. Accordingly, it is possible to increase breakdown voltage between the gate and the drain. On the contrary, in case the breakdown voltage is set to a predetermined value, it is possible to increase the donor impurity concentration of the n+-type AlGaAs layer 33 as the electron supply layer relevantly. As a result, the number of electrons flowing in the undoped InGaAs layer 35 as the electron transmitting layer is increased. In this way, there are advantages of substantially improving current density, channel resistance, and a high frequency distortion characteristic.

Problems solved by technology

Such an aspect may cause a lot of problems such as occurrence of damages by electrostatic discharge due to low insulation strength or deterioration in isolation due to leakage of a high frequency signal.

However, the nitride film is hard and therefore causes cracks on pad portions by pressure at the time of bonding.

However, a gold plating process causes increases in the number of processes and in costs.

The gold plating process causes increases in the number of processes and in costs.

The gold plating process causes increases in the number of processes and in costs.

For this reason, problems such as degradation in bonding adhesion or gouges on the substrate occur and lead to reduction in yields or deterioration in reliability.

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