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Maskless etch-back method applicable to selective emitter solar cell

A solar cell and emitter technology, applied in circuits, electrical components, climate sustainability, etc., can solve problems such as increasing the cost of equipment and consumables, and achieve the goal of improving short-wave photon response, improving battery performance, and improving surface passivation quality. Effect

Active Publication Date: 2012-10-03
SUZHOU TALESUN SOLAR TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the mask etch-back selective emitter method also faces the negative impact of non-overprinted high-doped concentration regions on electrical properties, and additional masking processes are required to protect high-doped concentration regions, thereby increasing the cost of equipment and consumables

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0028] The silicon wafer used is a p-type single crystal silicon wafer of 156×156mm2.

[0029] Put the silicon chip into the NaOH solution, the weight percentage of NaOH is 30%, and add H into the solution 2 o 2 , H 2 o 2 The volume percentage is 10%, heated to 70°C, and the reaction time is controlled to ensure that the thickness of single-sided damage is 8-10 μm.

[0030] Put the silicon wafer into the oxidation furnace, and use the steam oxidation method to form 20-30nm thick SiO on the surface of the silicon wafer 2 layer.

[0031] The method of screen printing is used to screen-print the corrosive slurry on the silicon oxide wafer according to the pattern of the metal grid line, the width is 300-400um, and the slurry is cleaned after corroding the pattern.

[0032] Put the above-treated silicon wafer into a diffusion furnace for diffusion. After diffusion, the square resistance of the etched pattern area is 30-40Ω / sqr, and that of other areas is 70-80Ω / sqr.

[0033]...

Embodiment 2

[0036] The silicon wafer used is a p-type polysilicon wafer of 156×156mm2, and the damaged layer is removed.

[0037] Select the mixed solution of HF and HNO3, the volume percentage of the mixed solution is 60%, the volume ratio of HF and HNO3 is 1:3.5, the temperature is 7°C when removing the mechanical damage layer, and the reaction time is controlled to ensure that the thickness of the single-sided damage is 6 -7 μm.

[0038] Put the above-treated silicon wafer into a diffusion furnace for diffusion, and the resistance after diffusion is 50-60Ω / sqr. Use a 532nm laser to partially melt the phospho-silicate glass on the diffused silicon wafer according to the pattern of the metal grid lines to form a part of the metal grid lines with a square resistance of 30-40Ω / sqr and a grid line width of 300-400um. Put the above treated silicon wafer into hydrofluoric acid solution to remove the surface phosphosilicate glass, and etch to remove the back junction.

[0039] After that, pu...

Embodiment 3

[0043] A p-type quasi-single crystal silicon wafer of 156×156mm2 is adopted, and the (100) grain area accounts for about 90% of the entire silicon wafer.

[0044] Put the silicon wafer into the NaOH solution, the weight percentage of NaOH is 30%, add H2O2 into the solution, the volume percentage of H2O2 is 10%, heat to 70°C, control the reaction time to ensure that the thickness of one side is 8-10μm.

[0045] Phosphorus paste or silicon ink is screen-printed on the surface of the silicon wafer according to the pattern of the metal grid line, and the line width is 200-300um. Diffusion is carried out in a diffusion furnace. After diffusion, the square resistance of the metal grid line area is 30-40Ω / sqr, and the square resistance of other areas 70-80Ω / sqr.

[0046] Put the above treated silicon wafer into a mixed solution of hydrofluoric acid and nitric acid for etching back. The ratio of hydrofluoric acid and nitric acid is 1:5. 120Ω / sqr.

[0047] A silicon nitride film is f...

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PUM

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Abstract

The invention relates to a maskless etch-back method applicable to a selective emitter solar cell. The maskless etch-back method is characterized in that silicon slices with high / low doping concentration difference are formed by a selective emitter etching-back method, and doped layers on the surfaces of high / low doping-concentration areas are removed at the same time; the etch-back target sheet resistance of the high doping concentration area is 30-60OPS, and the sheet resistance of the low doping concentration area is 80-120OPS. Thus, the high-doping concentration area is etched back to effectively reduce a surface dead layer, so the surface passivation quality of a non-metal coverage area is improved under the condition that metal-semiconductor contact is not affected, the recombination of the surface and an emission layer is reduced and shortwave photon response is improved, so as to improve the performance of the cell.

Description

technical field [0001] The invention relates to an etch back method, in particular to a maskless etch back method suitable for selective emitter solar cells. Background technique [0002] The development direction of solar cells is low cost and high efficiency. Selective emitter solar cells are a new type of high-efficiency structural cells that can be mass-produced. [0003] The main characteristics of selective diffusion solar cells are high doping concentration in the metallization area and low doping concentration in the illumination area. The purpose is to improve the surface passivation quality without reducing the quality of the gold half-contact, and reduce the surface recombination and emissive layer recombination. Improve the photon response in the blue light band to improve battery performance. Selective diffusion solar cells have a good gold-half ohmic contact; the metallization area is thick and the diffusion area has a deep junction, and impurities such as met...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L31/18
CPCY02P70/50
Inventor 魏青竹
Owner SUZHOU TALESUN SOLAR TECH CO LTD
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