A double polycrystalline strained si BiCMOS integrated device and its preparation method

An integrated device, double polycrystalline technology, applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve the problems of confinement, low carrier material mobility of Si materials, etc.

Inactive Publication Date: 2015-09-30
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] Due to the low mobility of Si material carrier materials, the performance of integrated circuits manufactured using Si BiCMOS technology, especially the frequency performance, is greatly limited; for SiGe BiCMOS technology, although SiGe HBT is used f

Method used

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  • A double polycrystalline strained si BiCMOS integrated device and its preparation method

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0129] Embodiment 1: the preparation channel length is the double polycrystalline strained Si BiCMOS integrated device and circuit of 22nm, and concrete steps are as follows:

[0130] Step 1, epitaxial growth.

[0131] (1a) Select the SOI substrate, the support material of the lower layer of the substrate is Si, and the middle layer is SiO 2 , with a thickness of 150nm, and the upper material is doped with a concentration of 1×10 16 cm -3 N-type Si with a thickness of 100nm;

[0132] (1b) Using chemical vapor deposition (CVD), grow a layer of N-type epitaxial Si layer with a thickness of 50nm on the upper Si material at 600°C, as the collector region, and the doping concentration of this layer is 1× 10 16 cm -3 .

[0133] Step 2, deep trench isolation preparation.

[0134] (2a) Deposit a layer of SiO on the surface of the substrate at 600 °C by chemical vapor deposition (CVD) 2 ;

[0135] (2b) In the photolithographic isolation area, a deep groove with a depth of 2.5 ...

Embodiment 2

[0200] Embodiment 2: the preparation channel length is the strained Si BiCMOS integrated device and circuit of double polycrystalline of 30nm, and specific steps are as follows:

[0201] Step 1, epitaxial growth.

[0202] (1a) Select the SOI substrate, the support material of the lower layer of the substrate is Si, and the middle layer is SiO 2 , with a thickness of 300nm, and the upper material is doped with a concentration of 5×10 16 cm -3 N-type Si with a thickness of 120nm;

[0203] (1b) Using chemical vapor deposition (CVD), grow an N-type epitaxial Si layer with a thickness of 80nm on the upper Si material at 700°C as the collector region, and the doping concentration of this layer is 5× 10 16 cm -3 .

[0204] Step 2, deep trench isolation preparation.

[0205](2a) Deposit a layer of SiO on the surface of the substrate at 700°C by chemical vapor deposition (CVD) 2 ;

[0206] (2b) In the photolithographic isolation area, a deep groove with a depth of 3 μm is etch...

Embodiment 3

[0271] Embodiment 3: the preparation channel length is the double polycrystalline strained Si BiCMOS integrated device and circuit of 45nm, and concrete steps are as follows:

[0272] Step 1, epitaxial growth.

[0273] (1a) Select the SOI substrate, the support material of the lower layer of the substrate is Si, and the middle layer is SiO 2 , with a thickness of 400nm, and the upper material is doped with a concentration of 1×10 17 cm -3 N-type Si with a thickness of 150nm;

[0274] (1b) Using the method of chemical vapor deposition (CVD), grow a layer of N-type epitaxial Si layer with a thickness of 100nm on the upper layer of Si material at 750°C, as the collector region, and the doping concentration of this layer is 1× 10 17 cm -3 .

[0275] Step 2, deep trench isolation preparation.

[0276] (2a) Deposit a layer of SiO on the surface of the substrate at 800°C by chemical vapor deposition (CVD) 2 ;

[0277] (2b) In the photolithographic isolation area, a deep groo...

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Abstract

The invention discloses a double-polysilicon strained Si BiCMOS integrated device and a preparation method. The preparation method comprises growing an N-type Si epitaxial layer on an SOI (silicon on insulator) substrate to serve as the collector region of the bipolar device, preparing deep trench isolation, and sequentially preparing a base polysilicon, a base region and an emitter region to obtain a HBT (heterojunction bipolar transistor) device; etching an active region trench of an NMOS (N-channel metal oxide semiconductor) and PMOS (P-channel metal oxide semiconductor) device by lithography, continuously growing a Si buffer layer, a gradient SiGe layer, a fixed-component SiGe layer, an N-type strained Si channel layer and a Si buffer layer, a gradient SiGe layer, a fixed-component SiGe layer, a strained Si P-LDD (lightly doped drain) layer, a strained Si channe layer, a strained Si P-LDD layer, and a fixed-component SiGe layer in the active region trench of the NMOS and PMOS devices respectively, and preparing a drain and a gate to obtain the PMOS device; preparing a gate dielectric layer and gate polysilicon of the NMOS device to obtain the NMOS device; and preparing the strained Si BiCMOS integrated device and circuit with a MOS conductive channel of 22 to 45nm. According to the invention, the method can prepare the strained Si BiCMOS integrated device with enhanced performance at 600 to 800 DEG C by fully using the characteristics of mobility anisotropy of the strained Si material.

Description

technical field [0001] The invention belongs to the technical field of semiconductor integrated circuits, and in particular relates to a double-polycrystalline strained Si BiCMOS integrated device and a preparation method. Background technique [0002] The integrated circuit, which appeared in 1958, is one of the most influential inventions of the 20th century. Microelectronics, which was born based on this invention, has become the basis of existing modern technology, accelerating the process of knowledge and informationization of human society, and at the same time changing the way of thinking of human beings. It not only provides humans with a powerful tool to transform nature, but also opens up a broad space for development. [0003] Semiconductor integrated circuits have become the basis of the electronics industry, and people's huge demand for the electronics industry has prompted the rapid development of this field. In the past few decades, the rapid development of ...

Claims

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Application Information

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IPC IPC(8): H01L27/06H01L21/84
Inventor 张鹤鸣王海栋胡辉勇宋建军周春宇宣荣喜舒斌郝跃
Owner XIDIAN UNIV
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