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Double-polycrystal and double-strain mixed crystal face Si-base Bi CMOS (complementary metal-oxide-semiconductor transistor) integrated device and manufacturing method thereof

A technology of mixed crystal planes and integrated devices, applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve the problems of complex preparation process, poor heat dissipation performance, low mechanical strength, etc.

Inactive Publication Date: 2012-10-17
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although GaAs and InP-based compound devices have superior frequency characteristics, their preparation process is more complicated than Si process, high cost, difficult to prepare large-diameter single crystal, low mechanical strength, poor heat dissipation performance, incompatibility with Si process and lack of SiO 2 Such passivation layer and other factors limit its wide application and development.
[0007] Due to the low mobility of Si materials, the performance of integrated circuits manufactured by Si BiCMOS technology, especially the frequency performance, is greatly limited; for SiGe BiCMOS technology, although SiGe HBT is used for bipolar transistors, However, Si CMOS is still used for unipolar devices that restrict the improvement of the frequency characteristics of BiCMOS integrated circuits, so these limit the further improvement of the performance of BiCMOS integrated circuits

Method used

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  • Double-polycrystal and double-strain mixed crystal face Si-base Bi CMOS (complementary metal-oxide-semiconductor transistor) integrated device and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0129] Embodiment 1: Preparation of 22nm double polycrystalline, double strain mixed crystal plane Si-based BiCMOS integrated device and circuit, the specific steps are as follows:

[0130] Step 1, SOI substrate material preparation.

[0131] (1a) Select the N-type doping concentration as 1×10 15 cm -3 The Si wafer with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 0.5 μm, which is used as the upper substrate material, and hydrogen is injected into the substrate material;

[0132] (1b) Select the N-type doping concentration as 1×10 15 cm -3 The Si sheet with a crystal plane of (110) is oxidized on its surface, and the thickness of the oxide layer is 0.5 μm, which is used as the base material of the lower layer;

[0133] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of substrate material after hydrogen injection;

[0134] (1d) Put the oxide layer on the su...

Embodiment 2

[0203] Embodiment 2: Preparation of 30nm double polycrystalline, double strain mixed crystal plane Si-based BiCMOS integrated device and circuit, the specific steps are as follows:

[0204] Step 1, SOI substrate material preparation.

[0205] (1a) Select the N-type doping concentration as 3×10 15 cm -3 The Si sheet with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 0.75 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;

[0206] (1b) Select the N-type doping concentration as 3×10 15 cm -3 The Si sheet with a crystal plane of (110) is oxidized on the surface, and the thickness of the oxide layer is 0.75 μm, which is used as the base material of the lower layer;

[0207] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of substrate material after hydrogen injection;

[0208] (1d) Put the oxide layer on t...

Embodiment 3

[0277] Embodiment 3: Preparation of 45nm double polycrystalline, double strain mixed crystal plane Si-based BiCMOS integrated device and circuit, the specific steps are as follows:

[0278] Step 1, SOI substrate material preparation.

[0279] (1a) Select the N-type doping concentration as 5×10 15 cm -3 Si wafers with a crystal plane of (100) are oxidized on the surface, and the thickness of the oxide layer is 1 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;

[0280] (1b) Select the N-type doping concentration as 5×10 15 cm -3 The Si wafer, the crystal plane is (110), the surface is oxidized, and the thickness of the oxide layer is 1 μm, which is used as the base material of the lower active layer;

[0281] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of substrate material after hydrogen injection;

[0282] (1d) Put the oxide layer on the su...

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Abstract

The invention discloses a double-polycrystal and double-strain mixed crystal face Si-base Bi CMOS (complementary metal-oxide-semiconductor transistor) integrated device and a manufacturing method of the double-polycrystal and double-strain mixed crystal face Si-base Bi CMOS integrated device. The method provided by the invention comprises the following steps of: manufacturing an SOI (silicon on insulator) substrate with a crystal face (110) being as an upper base material and a crystal face (100) being as a lower base material; growing N-Si to be as a bipolar device collector region; growing P-SiGe / i-Si / i-Poly-Si in a base region in a photoetching region, manufacturing an emission electrode, a base electrode and a collector electrode, and forming an SiGe Hbt device; manufacturing a deep groove for isolation; selectively growing a PMOS (P-channel metal oxide semiconductor) device active region with the crystal face (110) in a PMOS device region and manufacturing a compression strain Si vertical channel PMOS device; etching a deep groove in an NMOS (N-channel metal oxide semiconductor) device region, selectively growing an NMOS device active region with the crystal face (100) and manufacturing an Si channel NMOS device; and manufacturing the Si-base Bi CMOS integrated device and circuit. According to the invention, the characteristics that electronic mobility of a tensile strain Si is higher than that of a body Si material, the hole mobility of a compression strain Si material is higher than that of the body Si material and mobility is anisotropic are fully used to manufacture the double-polycrystal and double-strain mixed crystal face Si-base Bi CMOS integrated circuit.

Description

technical field [0001] The invention belongs to the technical field of semiconductor integrated circuits, in particular to a Si-based BiCMOS integrated device with double polycrystalline and double strained mixed crystal planes and a preparation method. Background technique [0002] The integrated circuit, which appeared in 1958, is one of the most influential inventions of the 20th century. Microelectronics, which was born based on this invention, has become the basis of existing modern technology, accelerating the process of knowledge and informationization of human society, and at the same time changing the way of thinking of human beings. It not only provides humans with a powerful tool to transform nature, but also opens up a broad space for development. [0003] Semiconductor integrated circuits have become the basis of the electronics industry, and people's huge demand for the electronics industry has prompted the rapid development of this field. In the past few dec...

Claims

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Application Information

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IPC IPC(8): H01L27/06H01L21/8249H01L21/28
Inventor 张鹤鸣吕懿胡辉勇王海栋宋建军宣荣喜舒斌郝跃
Owner XIDIAN UNIV
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