Double-polycrystal and double-strain mixed crystal face Si-base Bi CMOS (complementary metal-oxide-semiconductor transistor) integrated device and manufacturing method thereof
A technology of mixed crystal planes and integrated devices, applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve the problems of complex preparation process, poor heat dissipation performance, low mechanical strength, etc.
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Embodiment 1
[0129] Embodiment 1: Preparation of 22nm double polycrystalline, double strain mixed crystal plane Si-based BiCMOS integrated device and circuit, the specific steps are as follows:
[0130] Step 1, SOI substrate material preparation.
[0131] (1a) Select the N-type doping concentration as 1×10 15 cm -3 The Si wafer with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 0.5 μm, which is used as the upper substrate material, and hydrogen is injected into the substrate material;
[0132] (1b) Select the N-type doping concentration as 1×10 15 cm -3 The Si sheet with a crystal plane of (110) is oxidized on its surface, and the thickness of the oxide layer is 0.5 μm, which is used as the base material of the lower layer;
[0133] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of substrate material after hydrogen injection;
[0134] (1d) Put the oxide layer on the su...
Embodiment 2
[0203] Embodiment 2: Preparation of 30nm double polycrystalline, double strain mixed crystal plane Si-based BiCMOS integrated device and circuit, the specific steps are as follows:
[0204] Step 1, SOI substrate material preparation.
[0205] (1a) Select the N-type doping concentration as 3×10 15 cm -3 The Si sheet with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 0.75 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;
[0206] (1b) Select the N-type doping concentration as 3×10 15 cm -3 The Si sheet with a crystal plane of (110) is oxidized on the surface, and the thickness of the oxide layer is 0.75 μm, which is used as the base material of the lower layer;
[0207] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of substrate material after hydrogen injection;
[0208] (1d) Put the oxide layer on t...
Embodiment 3
[0277] Embodiment 3: Preparation of 45nm double polycrystalline, double strain mixed crystal plane Si-based BiCMOS integrated device and circuit, the specific steps are as follows:
[0278] Step 1, SOI substrate material preparation.
[0279] (1a) Select the N-type doping concentration as 5×10 15 cm -3 Si wafers with a crystal plane of (100) are oxidized on the surface, and the thickness of the oxide layer is 1 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;
[0280] (1b) Select the N-type doping concentration as 5×10 15 cm -3 The Si wafer, the crystal plane is (110), the surface is oxidized, and the thickness of the oxide layer is 1 μm, which is used as the base material of the lower active layer;
[0281] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of substrate material after hydrogen injection;
[0282] (1d) Put the oxide layer on the su...
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