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Readout integrated circuit with two-step background suppression function

A technology for reading out integrated circuits and background suppression, which is used in measurement devices, instruments, scientific instruments, etc., can solve the problems of difficult signal acquisition, low background suppression accuracy, and low signal-to-noise ratio, and achieves elimination of channel length modulation. effect, low equivalent impedance, and the effect of improving the signal-to-noise ratio

Inactive Publication Date: 2013-08-21
SHANGHAI INST OF TECHNICAL PHYSICS - CHINESE ACAD OF SCI
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  • Abstract
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  • Application Information

AI Technical Summary

Problems solved by technology

It adopts a two-step background suppression circuit module with an improved structure, and uses a BDI front-end input stage module with a folded cascode negative feedback operational amplifier to solve the problems of low background suppression accuracy, difficult signal acquisition, short integration time, and The problem of low signal-to-noise ratio, and further simplifies the sample and hold circuit structure, and expands the temperature application range

Method used

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  • Readout integrated circuit with two-step background suppression function
  • Readout integrated circuit with two-step background suppression function
  • Readout integrated circuit with two-step background suppression function

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Embodiment Construction

[0025] The scale of the infrared focal plane array is 64×64, the pixel area is 60um×60um, the bias voltage of the common terminal of the detector is 0.5V, the minimum clock is 2.5MHz, the working temperature is 50K, the accuracy of the production background subtraction current is 10nA / 10mV, and the integral capacitor The size of the NW capacitor is 1pF to 2.8pF, the sampling capacitor is a 0.1pF NW capacitor, and the filter capacitor is a 0.5pF NW capacitor.

[0026] (1) The readout circuit unit is divided into a BDI pre-input stage module and a sample-and-hold circuit module, including an operational amplifier, an injection tube, an integrating capacitor, and a sampling capacitor. The width to length ratio of the injection pipe is 3:1.5.

[0027](2) The negative feedback operational amplifier adopts a folded cascode structure, so that the setting of its common terminal conforms to the setting of the detector bias voltage of 0.5V, and its good performance at low temperature is...

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Abstract

The invention discloses a readout integrated circuit with a two-step background suppression function. According to the readout integrated circuit with the two-step background suppression function, a two-step background suppression circuit module in a voltage-current conversion method is used for generating a fixed reducing current, firstly, a background current part of a detector light current is removed, then a voltage signal is obtained through buffered direct injection (BDI) preposed input stage module integration using a high-gain negative feedback operational amplifier, and is sampled to a sampling capacitor through a sampling hold circuit module, finally, an analog signal is output through a two-stage source following output stage module with a low-pass filtering function. The readout integrated circuit with the two-step background suppression function achieves suppression to a background current in earlier stage signal processing, effectively prolongs integral time, and increases a contrast ratio and the signal-to-noise ratio of the output signal.

Description

technical field [0001] The present invention relates to an infrared focal plane readout integrated circuit, specifically a readout integrated circuit (Readout Integrated Circuit-ROIC) with a two-step background suppression function, which works at a temperature of 50K and is used for a very long wave infrared focal plane array ( Infrared Focus Plane Array-IRFPA), the background current in the detector photocurrent can be subtracted, and only the effective photosignal current is integrated, sampled, denoised and output. Background technique [0002] The very long wave infrared focal plane array is the core device in the advanced infrared system. The infrared focal plane array generally consists of two parts: an infrared detector array and a readout circuit array. After the infrared detector on the focal plane receives the incident infrared radiation, it generates a partial charge related to the performance of the incident infrared radiation at the incident position of the in...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01J5/02G01J5/06
Inventor 郝立超陈洪雷丁瑞军张君玲黄爱波
Owner SHANGHAI INST OF TECHNICAL PHYSICS - CHINESE ACAD OF SCI
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