Redundant doping radiation-proof MOS (Metal Oxide Semiconductor) field-effect tube based on 65nm process
A field-effect transistor, anti-radiation technology, applied in electrical components, circuits, semiconductor devices, etc., can solve the problems of sub-threshold swing degradation, device failure, device threshold voltage drift, etc., and achieve enhanced resistance to total dose irradiation. ability, increased work reliability, and reduced sensitivity
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example 1
[0032] Example 1, making redundant doping with a width of 100nm, a depth of 50nm, and a concentration of 5×10 19 cm -3 65nmMOS Field Effect Transistor.
[0033] Step 1, growing an epitaxial layer.
[0034] SiH was deposited at a temperature of 650°C using chemical vapor deposition 4 An epitaxial layer with a thickness of 1200nm is grown on a P-type substrate as a reactant;
[0035] Then the epitaxial layer was treated with a depth of 150nm and a concentration of 1×10 18 cm -3 doping to adjust the channel concentration;
[0036] Step 2, etching the isolation groove.
[0037] Thin SiO with a thickness of 10 nm was grown on the epitaxial layer by thermal oxidation at a temperature of 1250 °C by a dry oxygen process 2 buffer layer, on SiO 2 25nm thick Si grown on the buffer layer 3 N 4 The protective layer;
[0038] in Si 3 N 4 Make a layer of photoresist on the protective layer, and make isolation groove windows on the sides of the photoresist by exposing and etching...
example 2
[0062] Example 2, making redundant doping with a width of 80nm, a depth of 40nm, and a concentration of 1×10 19 cm -3 65nmMOS Field Effect Transistor.
[0063] Step 1, using chemical vapor deposition method at a temperature of 600 ° C with SiH 4 An epitaxial layer with a thickness of 1200nm was grown on a P-type substrate as a reactant, and then the depth of the epitaxial layer was 125nm, and the concentration was 7×10 17 cm -3 doping to adjust the channel concentration;
[0064] Step 2, etching the isolation groove.
[0065] Thin SiO with a thickness of 8 nm was thermally oxidized on the epitaxial layer at a temperature of 1200 °C by a dry oxygen process. 2 buffer layer, on SiO 2 22nm thick Si grown on the buffer layer 3 N 4 protective layer; in Si 3 N 4 Make a layer of photoresist on the protective layer, and make isolation groove windows on the sides of the photoresist by exposing and etching to form two isolation grooves parallel to the channel direction and two ...
example 3
[0079] Example 3, making redundant doping with a width of 60nm, a depth of 20nm, and a concentration of 5×10 18 cm -3 65nmMOS Field Effect Transistor.
[0080] Step A, growing an epitaxial layer.
[0081] A1) using chemical vapor deposition method at a temperature of 550 ° C with SiH 4 An epitaxial layer with a thickness of 1200nm is grown on a P-type substrate as a reactant.
[0082] A2) The depth of the epitaxial layer is 100nm, the concentration is 2×10 17 cm -3 doping to adjust the channel concentration;
[0083] Step B, etching the isolation groove.
[0084] B1) Thin SiO with a thickness of 5nm is thermally oxidized and grown on the epitaxial layer at a temperature of 1100°C by a dry oxygen process 2 buffer layer, on SiO 2 20nm thick Si grown on the buffer layer 3 N 4 The protective layer;
[0085] B2) in Si 3 N 4 Make a layer of photoresist on the protective layer, and make isolation groove windows on the sides of the photoresist by exposing and etching to f...
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