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Mosfet terminal structure and manufacturing method thereof

A manufacturing method and technology of terminal structure, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of complex manufacturing process steps and size reduction, and achieve the effect of saving process steps, reducing size, and reducing chip area

Active Publication Date: 2018-01-12
ADVANCED SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] The technical problem to be solved by the present invention is to provide a MOSFET terminal structure and its manufacturing method in order to overcome the disadvantages of the MOSFET terminal structure in the prior art that restricts the size reduction and the manufacturing process steps are relatively complicated.

Method used

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  • Mosfet terminal structure and manufacturing method thereof
  • Mosfet terminal structure and manufacturing method thereof
  • Mosfet terminal structure and manufacturing method thereof

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Embodiment 1

[0045] This embodiment provides a method for manufacturing a MOSFET terminal structure, such as Figure 4 shown, including the following steps:

[0046] Step 101, using epitaxial process, in N-type heavy doping (for example, arsenic doping concentration greater than 1×10 19 / cm 3 ) on the single crystal silicon substrate 11, grow a layer of N-type lightly doped (such as phosphorus doping concentration 5×10 12 -5×10 16 / cm 3 ) silicon epitaxial layer 12, and grow a silicon dioxide field oxide layer 13 with a thickness of 0.7-3um on the N-type lightly doped silicon epitaxial layer 12 by using a high-temperature oxidation method (for example, in a wet oxygen atmosphere at 1000-1250°C) ;in, Figure 5 A schematic structural diagram obtained after step 101 is performed is shown.

[0047]Step 102, using photolithographic mask and etching technology to remove the silicon dioxide field oxide layer 13 above the preset first field limit ring region R1 and second field limit ring re...

Embodiment 2

[0064] In the MOSFET terminal structure of the present invention, the number of the first coupling polysilicon strip 15-1a and the second coupling polysilicon strip 15-2a that act as the potential of the coupling field limiting loop is not limited, and can be 1-3. This embodiment provides A MOSFET terminal structure, which differs from the MOSFET terminal structure in Embodiment 1 in that: as Figure 13 As shown, in this embodiment, the number of the first coupling polysilicon strips 15-1a and the second coupling polysilicon strips 15-2a are both two, and the spacing is between 0.5-3um.

[0065] The core idea of ​​the present invention is to use polysilicon thin strips as coupling field limiting ring potentials and connect polysilicon field plates during layout design to form a novel floating field plate terminal structure. The fine-line polysilicon does not affect the integrity and basic functions of the field limiting ring, and with the help of TCAD tools and DOE (Design of ...

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Abstract

The invention discloses an MOSFET terminal structure and a manufacturing method thereof. The method includes: S1, an N-type lightly-doped silicon epitaxial layer is grown on an N-type heavily-doped monocrystalline silicon substrate, and silicon dioxide field oxidation layers are grown on the N-type lightly-doped silicon epitaxial layer; S2, the silicon dioxide field oxidization layers above a plurality of field limiting ring areas are removed, and a plurality of field oxidization layer opening areas are formed; S3, silicon dioxide gate oxidization layers are gown in the plurality of field oxidization layer opening areas, and a polysilicon layer is deposited on the silicon dioxide field oxidization layers and the silicon dioxide gate oxidization layers; S4, the polysilicon layer is etched to form a plurality of polysilicon field plates, a plurality of coupling polysilicon strips, and a plurality of connection polysilicon strips; and S5, the self-aligning P-type foreign ion implantation operation is performed, and high-temperature annealing is conducted to form a plurality of field limiting rings. The MOSFET terminal structure is advantageous in that the size is small, and the structure is not limited by metal processing precision.

Description

technical field [0001] The invention relates to the field of semiconductor power devices, in particular to a MOSFET terminal structure and a manufacturing method thereof. Background technique [0002] With the continuous expansion of the application field of power semiconductor devices, the requirements for their cost performance are getting higher and higher. Reducing the terminal size of power devices can reduce the chip area and reduce manufacturing costs. [0003] figure 1 It is a schematic diagram of the MOSFET (metal-oxide semiconductor field effect transistor) terminal structure of the prior art 1, including: a single crystal silicon substrate 1, an N-type lightly doped semiconductor epitaxial layer 2, a field oxide layer 3, and a polysilicon field plate 5- 1 and 5-2, isolation dielectric 8, P-type doped field limiting rings 6-1 and 6-2, metal layers 10-1 and 10-2. Among them, the field limiting rings 6-1 and 6-2 are formed by self-aligned ion implantation and diffu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L29/06H01L29/40H01L29/78
CPCH01L29/0603H01L29/401H01L29/404H01L29/66068H01L29/66522H01L29/6653H01L29/78
Inventor 高文玉郎金荣陶有飞刘启星
Owner ADVANCED SEMICON MFG CO LTD