Thin film transistor and preparation method thereof

[0027] Example 1

[0028] This embodiment provides a method for preparing a thin film transistor, using PET plastic with a thickness of 50 microns as an insulating substrate layer, and the method specifically includes the following steps:

[0029] (1) Clean the PET insulating substrate layer and place it in the magnetron sputtering growth chamber. Under the condition of low-pressure high-purity argon gas with a gas pressure of 5 Pa, use the radio frequency magnetron sputtering method on the PET insulating lining. An ITO conductive thin film layer with a thickness of 60 nm was prepared on one side of the bottom layer as the gate electrode, and the sputtering power was controlled to be 100 W.

[0030] (2) In a low-pressure pure oxygen environment with a gas pressure of 10 Pa, a pulsed laser with a pulsed laser energy of 100 mJ and a pulsed laser frequency of 5 Hz was used to bombard the high-purity InGaZnO ceramic target, and the resulting plasma plume was deposited on the On the other side of the PET insulating substrate layer, an InGaZnO semiconductor thin film layer with a thickness of 35 nm is formed as an active layer thin film.

[0031] (3) Fix a metal mask with source and drain electrode patterns on the surface of the InGaZnO semiconductor thin film layer as the active layer, and fix it in a thermal evaporation coating chamber, under a vacuum pressure of less than 1×10 -4 Under the condition of Pa, an aluminum thin film with a thickness of 35 nm was prepared on the surface of the InGaZnO semiconductor thin film layer by thermal evaporation coating method as the source and drain electrode layers of the transistor. The evaporation current controlled by the thermal evaporation coating technology was 53 A.

[0032] This embodiment also provides a thin film transistor prepared by the above preparation method, the specific structure is as follows figure 1 As shown, it includes an ITO conductive thin film layer, an InGaZnO semiconductor thin film layer, and a PET insulating substrate layer arranged between the ITO conductive thin film layer and the InGaZnO semiconductor thin film layer, and is also provided on the outer surface of the InGaZnO semiconductor thin film layer. There are aluminum thin film layers as source and drain electrodes, respectively.

[0033] Experimental verification

[0034] The output characteristics and transfer characteristics of the InGaZnO thin film transistor prepared by the preparation method described in this example were tested with a semiconductor characteristic tester. The results are as follows: figure 2 and image 3 shown. in, figure 2 The drain voltage on the abscissa and the leakage current on the ordinate refer to the voltage and current between the source and drain of the thin film transistor, respectively, image 3 The mid-trigger voltage refers to the voltage value between the gate and source of the transistor. It can be seen from the figure that the device works in the n-channel enhancement mode, and has obvious field-controlled current effect. Since the device uses the plastic substrate as the insulating layer, its thickness is still much larger than that of the traditional insulating layer film, resulting in a higher driving voltage. The thin film transistor of the invention greatly simplifies the manufacturing process and has broad application prospects in the occasion of low-cost large-area electronic circuits.

[0035] Example 2

[0036] This embodiment provides a method for preparing a thin film transistor, using glass with a thickness of 50 microns as an insulating substrate layer, and the specific preparation steps are roughly the same as those in Embodiment 1, except that:

[0037] The steps of preparing the metal oxide semiconductor thin film layer and the source-drain electrodes on the other side surface of the insulating substrate layer include:

[0038] First, fix the metal mask with source and drain electrode patterns on the surface of the glass insulating substrate layer, and fix it in the thermal evaporation coating chamber, under the vacuum pressure less than 1×10 -4 Under the condition of Pa, an aluminum thin film with a thickness of 35 nm was prepared on the other surface of the glass insulating substrate layer by thermal evaporation coating method as the source and drain electrode layers of the transistor, wherein the evaporation current controlled by the thermal evaporation coating technology was 53 A.

[0039] Then, in a low-pressure pure oxygen environment with a gas pressure of 5 Pa to 10 Pa, a pulsed laser with a pulsed laser energy of 100 mJ and a pulsed laser frequency of 5 Hz was used to bombard the high-purity InZnO ceramic target, and the resulting plasma plume was deposited on the belt. An InZnO semiconductor thin film layer with a thickness of 35 nm was formed as an active layer on the surface on the side of the glass insulating substrate layer with the source-drain electrode layer.

[0040] This embodiment also provides a thin film transistor prepared by the above preparation method, the specific structure is as follows Figure 4As shown, it includes an ITO conductive film, an InZnO semiconductor film layer, and the glass insulating substrate layer disposed between the ITO conductive film and the InZnO semiconductor film layer, and the glass insulating substrate layer is connected to the InZnO semiconductor layer. An aluminum thin film layer serving as the source and drain electrodes is also arranged between the thin film layers.

[0041] Example 3

[0042] This embodiment provides a method for preparing a thin film transistor, using paper with a thickness of 75 microns as an insulating substrate, and the specific preparation steps are roughly the same as those in Embodiment 1, except that:

[0043] When preparing the metal oxide semiconductor thin film on the other side surface of the insulating substrate layer, in this embodiment, a ZnO thin film is used as the metal oxide semiconductor thin film layer.

[0044] The structure of a thin film transistor prepared by the above preparation method provided in this embodiment is the same as the structure in Embodiment 1.