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Making method of semiconductor chip

A manufacturing method and semiconductor technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problem of low external quantum efficiency of GaN-based LEDs, and achieve the effects of easy mass production, improved quantum efficiency, and improved luminous brightness.

Inactive Publication Date: 2017-05-31
XIANGNENG HUALEI OPTOELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a method for manufacturing a semiconductor chip to solve the technical problem that the external quantum efficiency of GaN-based LEDs is not high

Method used

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  • Making method of semiconductor chip

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0032] Grow a GaN epitaxial layer on a sapphire substrate, the thickness of the epitaxial layer is 6μm, and use an electron beam evaporation machine to evaporate a layer Thick ITO conductive expansion layer, followed by photolithography process to expose excess conductive expansion layer, with FeCl 3 Wet-etch the exposed conductive extension layer with a mixed solution of HCl, etch the epitaxial wafer with an ICP etching machine to expose the steps and the N-type GaN layer, the etching depth is 1.3-1.5 μm, and make a P-type electrode on the conductive extension layer , N-type electrode 1 is made on N-type GaN, the width H of N-type electrode line 2 is 10 μm, and then SiO is deposited by PECVD 2 Make a passivation layer, then test the adhesion between the metal electrode and the conductive extension layer, and then complete the post-processing steps such as wafer thinning, back-plating reflective layer, cutting slivers, point measurement and sorting, etc. The luminous brightn...

Embodiment 2

[0034] Grow a GaN epitaxial layer on a sapphire substrate, the thickness of the epitaxial layer is 6μm, and use an electron beam evaporation machine to evaporate a layer Thick ITO conductive expansion layer, followed by photolithography process to expose excess conductive expansion layer, with FeCl 3 Wet-etch the exposed conductive extension layer with a mixed solution of HCl, etch the epitaxial wafer with an ICP etching machine to expose the steps and the N-type GaN layer, the etching depth is 1.3-1.5 μm, and make a P-type electrode on the conductive extension layer , make N-type electrodes on N-type GaN, the electrode line width is 7μm, and then use PECVD to deposit SiO 2 Make a passivation layer, then test the adhesion between the metal electrode and the conductive extension layer, and then complete the post-processing steps such as wafer thinning, back-plating reflective layer, cutting slivers, point measurement and sorting, etc. The luminous brightness of the 150mA test...

Embodiment 3

[0036] Grow a GaN epitaxial layer on a sapphire substrate, the thickness of the epitaxial layer is 6μm, and use an electron beam evaporation machine to evaporate a layer Thick ITO conductive expansion layer, followed by photolithography process to expose excess conductive expansion layer, with FeCl 3 Wet-etch the exposed conductive extension layer with a mixed solution of HCl, etch the epitaxial wafer with an ICP etching machine to expose the steps and the N-type GaN layer, the etching depth is 1.3-1.5 μm, and make a P-type electrode on the conductive extension layer , make N-type electrodes on N-type GaN, the electrode line width is 5 μm, and then use PECVD to deposit SiO 2 Make a passivation layer, then test the adhesion between the metal electrode and the conductive extension layer, and then complete the post-processing steps such as wafer thinning, back-plating reflective layer, cutting slivers, point measurement and sorting, etc. The luminous brightness of the 150mA tes...

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Abstract

The invention provides a making method of a semiconductor chip. The making method includes steps: A, making an epitaxial layer on a substrate material; B, making a conductive extension layer on the epitaxial layer, wherein the conductive extension layer is made of indium tin oxide according to an indium-tin ratio of 95:5, and coating thickness is 500-1000A; C, etching on the epitaxial layer to form corresponding crystal grain graphs, and exposing steps of a N-type GaN layer, wherein etching depth is 1-2um, and width of a cutting way is 10-30um. Size and width of a metal electrode playing a conductive role are changed to reduce absorption of light so as to achieve the objective of improving external quantum efficiency of the chip.

Description

technical field [0001] The invention relates to the field of semiconductor LEDs, in particular to a chip manufacturing method capable of improving the luminous brightness of a semiconductor chip. Background technique [0002] Compared with the internal quantum efficiency, the external quantum efficiency and light extraction efficiency of GaN-based LEDs still need further technological breakthroughs to improve. The light extraction efficiency and external quantum efficiency are essentially the same, and the reasons for the low external quantum efficiency and light extraction efficiency of GaN-based LEDs mainly include the absorption of light by lattice defects, the absorption of light by the substrate, and the process of light emission. Total reflection in the material layer, waveguide effect in the material layer, etc. According to the current research, there are mainly the following reasons that affect the photon escape: 1. Most of the photons return to the inside of the s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L33/00H01L33/36H01L33/38
CPCH01L33/0075H01L33/36H01L33/38
Inventor 徐平
Owner XIANGNENG HUALEI OPTOELECTRONICS
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