Silicon carbide MOSFET and manufacture method thereof

A technology of silicon carbide and oxide, which is applied in the field of microelectronics, can solve the problems of high interface density of silicon carbide MOSFETs, achieve the effects of reducing dangling bonds, small threshold voltage shift, and easing interface stress

Inactive Publication Date: 2018-04-03
XIDIAN UNIV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The invention provides a silicon carbide MOSFET and a manufacturing method thereof, which a

Method used

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  • Silicon carbide MOSFET and manufacture method thereof
  • Silicon carbide MOSFET and manufacture method thereof
  • Silicon carbide MOSFET and manufacture method thereof

Examples

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no. 1 example

[0029] This embodiment provides a silicon carbide MOSFET, figure 1 is a schematic diagram of the MOSFET, as figure 1 As shown, the MOSFET includes the following components from bottom to top: drain metal 1, N + Substrate 2, N - Drift layer 3, P well 4, JFET region 5, N+ source region 6, P+ contact region 7, group II alkaline earth metal oxide interface layer 8, SiO 2 Gate dielectric layer 9 , source metal 10 and polysilicon 11 .

[0030] like figure 1 As shown, the interface layer formed by the alkaline earth metal oxide is vertically arranged on the SiO of the MOSFET 2 Between the gate dielectric layer and the JFET region, two N + between source contacts.

[0031] The alkaline earth metal oxides involved in this embodiment are group II alkaline earth metal oxides, and the thickness of the interface layer formed by the alkaline earth metal oxides can be 0.3 to 5 nm, wherein SiO 2 The thickness of the gate dielectric layer is 30nm-150nm, wherein the alkaline earth metal ...

no. 2 example

[0036] This embodiment provides a silicon carbide MOSFET manufacturing method, which is used to manufacture the silicon carbide MOSFET provided in the first embodiment above, figure 2 is the flowchart of the method, such as figure 2 As shown, the method includes the following steps:

[0037] Step 201: in sequence in N - P well region, N + source region and P + After the contact area, in the P well area, the junction field effect transistor JFET area, and the two N + A thin layer of alkaline earth metal oxide is formed on the upper surface of the source region to form an alkaline earth metal oxide interface layer;

[0038] Optionally, the alkaline earth metal oxides involved in this embodiment are group II alkaline earth metal oxides.

[0039] Step 202: Deposit SiO on the interface layer 2 gate dielectric layer.

[0040] Among them, the alkaline earth metal oxide interfacial layer is vertically arranged on SiO 2 Between the gate dielectric layer and the JFET region, i...

no. 3 example

[0046] In this embodiment, on the basis of the above-mentioned embodiment 2, the whole process of making silicon carbide MOSFET is described in detail, as Figures 3 to 10 As shown, the preparation method provided in this embodiment includes the following steps:

[0047] Step 1: In N + Epitaxial growth of N on SiC substrate 2 - Drift layer 3, such as image 3 shown.

[0048] to N + The silicon carbide substrate was cleaned by RCA cleaning standard, and then epitaxially grown on the surface of the substrate with a thickness of 8 μm and a nitrogen ion doping concentration of 1×10 15 cm -3 N - The process conditions for the drift layer are: the epitaxy temperature is 1570°C, the pressure is 100mbar, the reaction gas is silane and propane, the carrier gas is pure hydrogen, and the impurity source is liquid nitrogen.

[0049] Step 2: In N - Multiple times of selective implantation of aluminum ions is performed on the drift layer 3 to form a P well region 4, such as Figure...

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Abstract

The invention provides a silicon carbide MOSFET and manufacture method thereof and is used for solving a problem of high interface density of a silicon carbide MOSFET in the prior art. The silicon carbide MOSFET includes an interface layer formed by alkaline earth metal oxide. The interface layer is longitudinally arranged between a silicon dioxide gate medium layer and a JFET area of the MOSFET and is transversely arranged between two N+ source region contacts of the MOSFET. The silicon carbide MOSFET relieves lattice mismatch between silicon carbide and silicon dioxide in a traditional silicon carbide MOSFET, so that the interface stress is relieved, dangling bonds are reduced, interface property is improved and device performance is improved.

Description

technical field [0001] The invention relates to the technical field of microelectronics, in particular to a silicon carbide MOSFET and a manufacturing method thereof. Background technique [0002] Silicon carbide (SiC) has become one of the most advantageous semiconductor materials for manufacturing high-temperature, high-power electronic devices due to its excellent physical, chemical and electrical properties, and has a power device quality factor much greater than that of silicon (Si) materials. The research and development of SiC power device MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor, Metal-Oxide-Semiconductor Field-Effect Transistor) began in the 1990s. It has a series of high input impedance, fast switching speed, high operating frequency, high temperature and high pressure resistance, etc. Advantages, it has been widely used in switching regulated power supply, high-frequency heating, automotive electronics and power amplifiers. [0003] Compared with...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L21/336H01L29/06H01L27/02
CPCH01L27/0203H01L29/0603H01L29/0684H01L29/66666H01L29/7802H01L29/1608H01L29/513H01L29/517H01L29/66068
Inventor 宋庆文张玉明贾一凡肖莉王茳王志坚
Owner XIDIAN UNIV
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