Method for manufacturing low-offset flat band voltage SiC MOS capacitor

A manufacturing method and flat-band voltage technology, applied in the field of microelectronics, can solve problems such as difficult nitrogen-containing gas dosage, influence on device interface characteristics, large flat-band voltage offset, etc., to reduce dangling bonds, reduce near-interface trap density, The effect of small flat-band voltage excursions

Inactive Publication Date: 2009-09-23
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although this process has improved the interface characteristics of the device to a certain extent, there are still large flat-band voltage shifts

Method used

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  • Method for manufacturing low-offset flat band voltage SiC MOS capacitor

Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0020] Embodiment 1, including the following steps:

[0021] Step 1. First use deionized water to ultrasonically clean the N-SiC epitaxial material, then use concentrated sulfuric acid to clean, and heat to smoke, boil for 10 minutes, soak for 30 minutes, and rinse the surface with deionized water several times; then use a ratio of 5 :1:1 H 2 O, H 2 O 2 Soak the N-SiC epitaxial material in a water bath for 5 minutes at a temperature of 80°C, and rinse the surface with ionized water several times after cleaning with hydrogen fluoride solution; then use the 6:1:1 ratio of H 2 O, H 2 O 2 Soak the N-SiC epitaxial material in a water bath of No. 2 mixed liquid with HCl for 5 minutes at a temperature of 80°C. After cleaning with a hydrogen fluoride solution, rinse the surface with ionized water several times; finally, use an infrared lamp to dry it.

[0022] Step 2. Perform N on the cleaned epitaxial layer + Ion implantation, the ion implantation energy is 2.5kev, and the dose is 2.0×10...

Example Embodiment

[0027] Embodiment 2, including the following steps:

[0028] Step 1. First use deionized water to ultrasonically clean the N-SiC epitaxial material, then use concentrated sulfuric acid to clean, and heat to smoke, boil for 10 minutes, soak for 30 minutes, and rinse the surface with deionized water several times; then use the ratio of 5:1:1 H 2 O, H 2 O 2 Soak the N-SiC epitaxial material in a water bath for 5 minutes at a temperature of 80°C, and wash the surface with ionized water several times with ionized water at a temperature of 80°C. 2 O, H 2 O 2 Soak the N-SiC epitaxial material in a water bath of No. 2 mixed liquid with HCl for 5 minutes at a temperature of 80°C. After cleaning with hydrogen fluoride solution, rinse the surface with ionized water several times; finally, it is dried by infrared light.

[0029] Step 2. Perform N on the cleaned epitaxial layer + Ion implantation, the ion implantation energy is 3.0kev, and the dose is 2.2×10 12 cm -2 ; Then perform Al on the s...

Example Embodiment

[0034] Embodiment 3 includes the following steps:

[0035] Step 1. Use deionized water to ultrasonically clean the N-SiC epitaxial material, then use concentrated sulfuric acid to clean, and heat to smoke, boil for 10 minutes, soak for 30 minutes, and rinse the surface with deionized water several times; then use a ratio of 5 :1:1 H 2 O, H 2 O 2 Soak the N-SiC epitaxial material in a water bath for 5 minutes at a temperature of 80°C, and wash the surface with ionized water several times after cleaning with hydrogen fluoride solution; then use a 6:1:1 ratio of H 2 O, H 2 O 2 Soak the N-SiC epitaxial material in a water bath of No. 2 mixed liquid with HCl at a temperature of 80°C for 5 minutes. After cleaning with hydrogen fluoride solution, rinse the surface with ionized water several times; finally, it is dried by infrared light.

[0036] Step 2. Perform N on the cleaned epitaxial layer + Ion implantation, the ion implantation energy is 4.8kev, and the dose is 3.2×10 12 cm -2 ; Th...

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Abstract

The invention discloses a method for manufacturing a low-offset flat band voltage SiC MOS capacitor, which mainly solves the problem that the trap intensity of a SiC/SiO2 interface is too high. The method comprises the following manufacturing processes: cleaning an N-SiC epitaxy material; after injecting N<+> into a SiC epitaxy layer by ion injection, injecting Al<-> into the epitaxy layer; oxidizing a layer of SiO2 on the epitaxy layer after the ion injection in the mode of dry-oxygen; sequentially finishing the annealing in Ar gas environment, the wet-oxygen oxidation annealing in wet-oxygen environment and the cold treatment in the Ar gas environment of an oxidized sample wafer; depositing a layer of SiO2 on the sample wafer after the cold treatment by chemical vapor deposition and first annealing the sample wafer in the Ar gas environment; and manufacturing an electrode by vacuum sputtering of Al and carrying out second annealing in the Ar gas environment so as to finish manufacturing the whole capacitor. The invention has the advantages of accurate control of N<+>\Al<-> doses, low trap intensity of the SiC/SiO2 interface, small flat band voltage offset of the SiC MOS capacitor and simple achieving process and can be used for improving the characteristics of the SiC/SiO2 interface of an N type SiC MOS device.

Description

technical field [0001] The invention belongs to the technical field of microelectronics and relates to the manufacture of semiconductor devices, in particular to a method for manufacturing MOS capacitors. Background technique [0002] SiC material is the only wide bandgap semiconductor that can generate SiO through natural oxidation 2 third-generation semiconductor materials. This third-generation semiconductor SiC has the advantages of wider bandgap, higher breakdown voltage, and higher thermal conductivity than the previous two generations of semiconductors. These advantages can make it work more stably at high temperatures and can be used for high-power applications. Therefore, research on SiC devices and processes has become a hot spot in the field of semiconductor device research. The quality of the oxide layer and its interface properties are important factors affecting the electrical performance of SiC devices. SiC devices usually work under high voltage and high p...

Claims

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Application Information

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IPC IPC(8): H01L21/02H01L21/265H01L21/316H01L21/3105
Inventor 郭辉张玉明王德龙张义门程萍张睿张甲阳
Owner XIDIAN UNIV
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