Method for manufacturing low-offset flat band voltage SiC MOS capacitor

A manufacturing method and flat-band voltage technology, applied in the field of microelectronics, can solve problems such as difficult nitrogen-containing gas dosage, influence on device interface characteristics, large flat-band voltage offset, etc., to reduce dangling bonds, reduce near-interface trap density, The effect of small flat-band voltage excursions

Inactive Publication Date: 2009-09-23

XIDIAN UNIV

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AI-Extracted Technical Summary

Problems solved by technology

Although this process has improved the interface characteristics of the device to a certain extent, there are still large flat-band voltage shifts ...

Abstract

The invention discloses a method for manufacturing a low-offset flat band voltage SiC MOS capacitor, which mainly solves the problem that the trap intensity of a SiC/SiO2 interface is too high. The method comprises the following manufacturing processes: cleaning an N-SiC epitaxy material; after injecting N<+> into a SiC epitaxy layer by ion injection, injecting Al<-> into the epitaxy layer; oxidizing a layer of SiO2 on the epitaxy layer after the ion injection in the mode of dry-oxygen; sequentially finishing the annealing in Ar gas environment, the wet-oxygen oxidation annealing in wet-oxygen environment and the cold treatment in the Ar gas environment of an oxidized sample wafer; depositing a layer of SiO2 on the sample wafer after the cold treatment by chemical vapor deposition and first annealing the sample wafer in the Ar gas environment; and manufacturing an electrode by vacuum sputtering of Al and carrying out second annealing in the Ar gas environment so as to finish manufacturing the whole capacitor. The invention has the advantages of accurate control of N<+>\Al<-> doses, low trap intensity of the SiC/SiO2 interface, small flat band voltage offset of the SiC MOS capacitor and simple achieving process and can be used for improving the characteristics of the SiC/SiO2 interface of an N type SiC MOS device.

Application Domain

Semiconductor/solid-state device manufacturing

Technology Topic

PhysicsLow offset +12

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Examples

Experimental program(3)

Example Embodiment

[0020] Embodiment 1, including the following steps:

[0021] Step 1. First use deionized water to ultrasonically clean the N-SiC epitaxial material, then use concentrated sulfuric acid to clean, and heat to smoke, boil for 10 minutes, soak for 30 minutes, and rinse the surface with deionized water several times; then use a ratio of 5 :1:1 H 2 O, H 2 O 2 Soak the N-SiC epitaxial material in a water bath for 5 minutes at a temperature of 80°C, and rinse the surface with ionized water several times after cleaning with hydrogen fluoride solution; then use the 6:1:1 ratio of H 2 O, H 2 O 2 Soak the N-SiC epitaxial material in a water bath of No. 2 mixed liquid with HCl for 5 minutes at a temperature of 80°C. After cleaning with a hydrogen fluoride solution, rinse the surface with ionized water several times; finally, use an infrared lamp to dry it.

[0022] Step 2. Perform N on the cleaned epitaxial layer + Ion implantation, the ion implantation energy is 2.5kev, and the dose is 2.0×10 12 cm -2; Then perform Al on the sample after ion implantation - Ion implantation, the ion implantation energy is 3.5kev, and the dose is 1.2×10 10 cm -2.

[0023] Step 3. Place the sample after ion implantation in an oxidation furnace with a temperature of 1050±5℃, and oxidize a layer of SiO with a thickness of 20nm with dry oxygen 2 Thin layer.

[0024] Step 4. Put the oxidized sample in an Ar atmosphere at a temperature of 1200±10℃ for 30min annealing; then put the annealed sample in a humid oxygen environment at a temperature of 950±5℃ for 1h wet oxygen oxidation Annealing; Finally, the annealed sample is cooled at a rate of 5°C/min in an Ar atmosphere.

[0025] Step 5. Use LPCVD to deposit a layer of SiO with a thickness of 60 nm on the cold-processed oxide layer 2; Next, the deposited sample is annealed in an Ar atmosphere at a temperature of 1000±5°C for 20 minutes.

[0026] Step 6. Use the lateral structure method on the cold-treated sample to make electrodes by sputtering. The diameter of the large electrode is 900um, the diameter of the small electrode is 200um, and the distance between the two electrodes is 1mm; then the sample after the sputtering electrode is placed Annealed in an Ar atmosphere at a temperature of 400±5°C for 30 minutes to complete the production of low-offset flat-band voltage SiC MOS capacitors.

Example Embodiment

[0027] Embodiment 2, including the following steps:

[0028] Step 1. First use deionized water to ultrasonically clean the N-SiC epitaxial material, then use concentrated sulfuric acid to clean, and heat to smoke, boil for 10 minutes, soak for 30 minutes, and rinse the surface with deionized water several times; then use the ratio of 5:1:1 H 2 O, H 2 O 2 Soak the N-SiC epitaxial material in a water bath for 5 minutes at a temperature of 80°C, and wash the surface with ionized water several times with ionized water at a temperature of 80°C. 2 O, H 2 O 2 Soak the N-SiC epitaxial material in a water bath of No. 2 mixed liquid with HCl for 5 minutes at a temperature of 80°C. After cleaning with hydrogen fluoride solution, rinse the surface with ionized water several times; finally, it is dried by infrared light.

[0029] Step 2. Perform N on the cleaned epitaxial layer + Ion implantation, the ion implantation energy is 3.0kev, and the dose is 2.2×10 12 cm -2; Then perform Al on the sample after ion implantation - Ion implantation, the ion implantation energy is 5.0kev, and the dose is 1.6×10 10 cm -2.

[0030] Step 3. Place the sample after ion implantation in an oxidation furnace with a temperature of 1050±5℃, and oxidize a layer of SiO with a thickness of 25nm with dry oxygen 2 Thin layer.

[0031] Step 4. Put the oxidized sample in an Ar atmosphere at a temperature of 1200±10℃ for 30min annealing; then put the annealed sample in a humid oxygen environment at a temperature of 950±5℃ for 1h of wet oxygen oxidation Annealing; Finally, the annealed sample is cooled at a rate of 5°C/min in an Ar atmosphere.

[0032] Step 5. Use LPCVD to deposit a layer of SiO with a thickness of 35nm on the cold-processed oxide layer 2; Then the deposited sample is annealed in Ar atmosphere at a temperature of 1000±5℃ for 20min.

[0033] Step 6. Use the transverse structure method for the cold-treated sample to make electrodes by sputtering. The diameter of the large electrode is 900um, the diameter of the small electrode is 200um, and the distance between the two electrodes is 1mm; then the sample after the sputtering electrode is placed Annealing in an Ar atmosphere at a temperature of 400±5°C for 30 minutes completed the fabrication of low-offset flat-band voltage SiC MOS capacitors.

Example Embodiment

[0034] Embodiment 3 includes the following steps:

[0035] Step 1. Use deionized water to ultrasonically clean the N-SiC epitaxial material, then use concentrated sulfuric acid to clean, and heat to smoke, boil for 10 minutes, soak for 30 minutes, and rinse the surface with deionized water several times; then use a ratio of 5 :1:1 H 2 O, H 2 O 2 Soak the N-SiC epitaxial material in a water bath for 5 minutes at a temperature of 80°C, and wash the surface with ionized water several times after cleaning with hydrogen fluoride solution; then use a 6:1:1 ratio of H 2 O, H 2 O 2 Soak the N-SiC epitaxial material in a water bath of No. 2 mixed liquid with HCl at a temperature of 80°C for 5 minutes. After cleaning with hydrogen fluoride solution, rinse the surface with ionized water several times; finally, it is dried by infrared light.

[0036] Step 2. Perform N on the cleaned epitaxial layer + Ion implantation, the ion implantation energy is 4.8kev, and the dose is 3.2×10 12 cm -2; Then perform Al on the sample after ion implantation - Ion implantation, the ion implantation energy is 8.0kev, and the dose is 2.2×10 10 cm -2.

[0037] Step 3. Place the sample after ion implantation in an oxidation furnace with a temperature of 1050±5℃, and oxidize a layer of SiO with a thickness of 35nm with dry oxygen 2 Thin layer.

[0038] Step 4. Place the oxidized sample in an Ar atmosphere at a temperature of 1200±10℃ for 30min annealing; then put the annealed sample in a humid oxygen environment at a temperature of 950±5℃ for 2h wet oxygen oxidation Annealing; Finally, the annealed sample is cooled at a rate of 5°C/min in an Ar atmosphere.

[0039] Step 5. Use LPCVD to deposit a layer of SiO with a thickness of 95 nm on the cold-treated oxide layer 2; Then the deposited sample is annealed in an Ar atmosphere at a temperature of 1000±5℃ for 20 minutes.

[0040] Step 6. Use the transverse structure method on the cold-treated sample to make electrodes by sputtering. The diameter of the large electrode is 900um, the diameter of the small electrode is 200um, and the distance between the two electrodes is 1mm; then the sample after the sputtering electrode is placed Annealed for 30 minutes in an Ar atmosphere at a temperature of 400±5°C to complete the fabrication of low-offset flat-band voltage SiC MOS capacitors.

PUM

Property	Measurement	Unit
Thickness	20.0 ~ 35.0	nm
Thickness	20.0	nm
Diameter	900.0	µm

Description & Claims & Application Information

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AI-Extracted Technical Summary

Problems solved by technology

Abstract

Image

Examples

Example Embodiment

Example Embodiment

Example Embodiment

PUM

Description & Claims & Application Information

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