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Manufacturing method for undoped transistor device

A manufacturing method and transistor technology, applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve problems restricting carbon nanotube devices, etc., and achieve the effect of great applicability

Active Publication Date: 2019-12-13
BEIJING INST OF CARBON BASED INTEGRATED CIRCUIT +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Therefore, the effective manufacture of source-drain contact metals has become one of the biggest differences in the manufacturing process of carbon nanotube devices compared with traditional silicon-based devices, and the biggest challenge is to form them in an efficient and self-aligned manner Source-drain contact metal, which has become a major obstacle restricting the development of carbon nanotube devices

Method used

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  • Manufacturing method for undoped transistor device
  • Manufacturing method for undoped transistor device
  • Manufacturing method for undoped transistor device

Examples

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Embodiment 1

[0061] This embodiment is mainly used in the gate-front structure, that is, it does not need to form a dummy gate electrode, but acts directly on the transistor. figure 1 Show the process steps of the preparation method of the non-doped transistor device of the present invention, according to the following figure 1 The steps shown and Figure 2-9 Embodiment 1 of the present invention will be described in detail.

[0062] According to step S1, firstly, a semiconductor layer 102 is deposited on the substrate 101, and a gate structure having sidewalls 103 and gate electrodes is formed on the semiconductor layer 102, wherein the sidewalls 103 are located on both sides of the gate electrode. The substrate 101 mainly plays a supporting role, and can be hard insulating materials such as silicon oxide, silicon nitride, quartz, glass, aluminum oxide, etc., and high-temperature-resistant flexible insulating materials such as PET, PEN, polyimide, etc., as long as it is very flat and uni...

Embodiment 2

[0077] Figure 10 It shows the process steps of the non-doped thin film transistor prepared by the high-K metal gate-last gate process in the present invention, according to the following Figure 10 The steps shown and Figure 11-23 Another specific embodiment of the present invention is described in detail.

[0078] Follow step S1, such as Figure 11 As shown, a semiconductor layer 202 is deposited on a substrate 201, and a dummy gate structure with sidewalls 203 and dummy gates 204 is formed on the semiconductor layer 202, wherein the sidewalls 203 are located on both sides of the dummy gate 204, and the dummy gate structure is formed on the semiconductor layer 202. The material of the gate electrode 204 may be polysilicon or amorphous silicon, and a polysilicon dummy gate electrode is used in this embodiment. According to actual needs, one or more gate dielectric layers (not shown in the figure) are often grown on the semiconductor layer 202. The material of the gate die...

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Abstract

The invention discloses a manufacturing method for an undoped transistor device. According to the method, a first contact hole etching stop layer is deposited on a semiconductor structure formed on asubstrate, then a first interlayer dielectric layer is deposited on the first contact hole etching stop layer, CMP planarization is carried out, a source drain (SD) electrode metal contact pattern isdefined, contact hole photoetching and etching are carried out, and finally source drain contact metal and local interconnection metal are deposited. The process can be applied to a front gate processand a rear gate process. When the method is applied to a rear gate process, a dummy gate is firstly formed, then a dummy gate electrode material in a trench is removed in a subsequent process, and agate medium, a metal gate and interconnection lead metal are deposited. According to the method, the parasitic capacitance problem caused by deposition of unnecessary source-drain metal on the side wall surface of the side wall can be effectively avoided.

Description

technical field [0001] The invention relates to a carbon nanotube CMOS integrated circuit technology, in particular to a method for manufacturing an undoped thin film transistor. Background technique [0002] As semiconductor technology continues to shrink down to technology nodes below 3nm, silicon-based integrated circuits are very likely to reach the limits of silicon materials and physical quantum mechanics. The continuous development of microelectronics urgently needs to find new materials with more potential and advantages to replace silicon materials and break through the limit of Moore's law. Carbon nanotubes (CNTs) have ultra-high carrier mobility, mean free path, and nanometer-scale diameter, and can be used to construct nanometer field-effect transistors with faster speed, lower power consumption, and smaller size, so carbon Nanotube (CNTs) electronics is considered to be one of the future information technologies most likely to replace silicon-based CMOS devices...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L51/05H01L51/10H01L51/40H01L51/00H10K99/00
CPCH10K85/221H10K10/464H10K10/84
Inventor 孟令款张志勇彭练矛
Owner BEIJING INST OF CARBON BASED INTEGRATED CIRCUIT
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