A new mems high q value non-solenoid integrated inductor and its preparation method
A technology integrating inductors and solenoids, applied in the field of microelectronics, can solve problems such as difficulty, high process cost, and subsequent packaging difficulties, and achieve the effects of suppressing substrate loss, reducing ohmic loss, and suppressing eddy current effects
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[0062] Specific novel process for preparing high-Q MEMS non-inductance of the solenoid integrates the following:
[0063] S1, such as Figure 3A , In 4-inch silicon wafer (silicon substrate 1) on the photoresist 6 is coated, prebaking, exposure, development, hard film-based SF6 / O 2 The method of low-temperature plasma etching reaction gas deep reactive ion etching (the DRIE) process on the silicon wafer etching to form a smooth steep sidewall 100μm deep TSV vias radius of 7.5μm shaped regular octagonal column, based on the sidewalls SiH 4 / O 2 Gas low pressure chemical vapor deposition (Low Pressure Chemical Vapor Deposition, referred to as LPCVD) depositing a layer of 1μm thick low temperature oxide layer (the LTO), for isolating the inductor and the silicon substrate, reduce the substrate loss. TSV thus forming micro-via holes of the inner: outer TSV microvia Number = 8: 2 * TSV via pattern 8. Wherein, inside the corresponding micro-vias TSV copper pillar inner group 23 micro,...
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