Method for improving manufacturing yield of LED chip
A LED chip and yield technology, which is applied in the direction of electrical components, circuits, semiconductor devices, etc., can solve problems such as flushing water and two-fluid cleaning machines, physical damage to LED chips, and abnormal surface pollution, etc., to improve product quality. The effect of appearance yield, realization of preparation and process operation is simple
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Embodiment 1
[0054] S1: Take GaAs substrate 2, and grow GaAs buffer layer 3, n-AlGaInP confinement layer 4, multi-quantum well active layer 5, p-AlGaInP confinement layer 6, first highly doped p-GaP Window layer 7 and the second highly doped p-GaP window layer 8 to obtain wafer epitaxial layer;
[0055] S2: Take the wafer after the growth of the epitaxial layer is completed, make a photoresist mask pattern on the second highly doped p-GaP window layer 8, etch to form an exposed area, and the exposed area runs through the second highly doped p-GaP window layer 8, and the bottom end of the exposed area is located in the middle of the first highly doped p-GaP window layer 7; then an oxide film 12 is deposited on the exposed area, and the oxide is TiO 2 ;
[0056] S3: Take the wafer after the evaporation treatment of the oxide film 12, and evaporate the ITO film 9 on the epitaxial layer of the wafer, and the ITO film 9 covers the entire surface of the epitaxial layer; the growth temperature o...
Embodiment 2
[0064] S1: Take GaAs substrate 2, and grow GaAs buffer layer 3, n-AlGaInP confinement layer 4, multi-quantum well active layer 5, p-AlGaInP confinement layer 6, first highly doped p-GaP Window layer 7 and the second highly doped p-GaP window layer 8 to obtain wafer epitaxial layer;
[0065] S2: Take the wafer after the growth of the epitaxial layer is completed, make a photoresist mask pattern on the second highly doped p-GaP window layer 8, etch to form an exposed area, and the exposed area runs through the second highly doped p-GaP window Layer 8, and the bottom end of the exposed area is located in the middle of the first highly doped p-GaP window layer 7; then an oxide film 12 is deposited on the exposed area, and the oxide is ZnO;
[0066] S3: Take the wafer after the evaporation treatment of the oxide film 12, and evaporate the ITO film 9 on the epitaxial layer of the wafer, and the ITO film 9 covers the entire surface of the epitaxial layer; the growth temperature of th...
Embodiment 3
[0074] S1: Take GaAs substrate 2, and grow GaAs buffer layer 3, n-AlGaInP confinement layer 4, multi-quantum well active layer 5, p-AlGaInP confinement layer 6, first highly doped p-GaP Window layer 7 and the second highly doped p-GaP window layer 8 to obtain wafer epitaxial layer;
[0075] S2: Take the wafer after the growth of the epitaxial layer is completed, make a photoresist mask pattern on the second highly doped p-GaP window layer 8, etch to form an exposed area, and the exposed area runs through the second highly doped p-GaP window Layer 8, and the bottom end of the exposed area is located in the middle of the first highly doped p-GaP window layer 7; then an oxide film 12 is deposited on the exposed area; the oxide is Al 2 o 3 ;
[0076] S3: Take the wafer after the evaporation treatment of the oxide film 12, and evaporate the ITO film 9 on the epitaxial layer of the wafer, and the ITO film 9 covers the entire surface of the epitaxial layer; the growth temperature o...
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