Silicon carbide laminated gate dielectric structure based on nitride buffer layer and preparation method of silicon carbide laminated gate dielectric structure
A technology of dielectric structure and buffer layer, which is used in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of degradation of silicon carbide MOS interface performance, and the overall performance of the device is not significantly improved, so as to improve electrical performance, improve Interface, the effect of eliminating carbon defects
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Embodiment 1
[0024] see figure 1 , a silicon carbide stacked gate dielectric structure based on an aluminum nitride buffer layer, comprising a silicon carbide epitaxial wafer 1 with a planar structure, a nitride buffer layer 2 is grown on the upper surface of the silicon carbide epitaxial wafer 1, and the nitride buffer layer 2 is The aluminum nitride buffer layer has a gate dielectric layer 3 grown on the upper surface of the aluminum nitride buffer layer. The gate dielectric layer 3 has a single-layer structure, wherein the gate dielectric layer 3 is an aluminum oxide dielectric layer.
[0025] Its preparation method is realized by the following steps:
[0026] S10: Perform standard RCA cleaning on the surface of the silicon carbide epitaxial wafer, and soak for t1 minutes in a hydrofluoric acid solution with a concentration of n1 to remove the natural oxide layer on the silicon carbide surface;
[0027] S20: Put the cleaned silicon carbide epitaxial wafer into chamber 1, inject trimeth...
Embodiment 2
[0033] see figure 2 , a silicon carbide stacked gate dielectric structure based on an aluminum nitride buffer layer, comprising a silicon carbide epitaxial wafer 1 with a planar structure, a nitride buffer layer 2 is grown on the upper surface of the silicon carbide epitaxial wafer 1, and the nitride buffer layer 2 is An aluminum nitride buffer layer, a gate dielectric layer 3 is grown on the upper surface of the aluminum nitride buffer layer, and the gate dielectric layer 3 is a double-layer stack structure, including a first gate dielectric layer 3-1 and a second gate dielectric layer 3-2 , wherein the first gate dielectric layer 3-1 is an aluminum oxide dielectric layer, and the second gate dielectric layer 3-2 is a silicon oxide dielectric layer.
[0034] Its preparation method is realized by the following steps:
[0035] S10: Perform standard RCA cleaning on the surface of the silicon carbide epitaxial wafer, and soak for t1 minutes in a hydrofluoric acid solution with ...
Embodiment 3
[0044] see image 3 , a silicon carbide stacked gate dielectric structure based on an aluminum nitride buffer layer, comprising a silicon carbide epitaxial wafer 1 with a trench structure, a nitride buffer layer 2 grown on the upper surface of the silicon carbide epitaxial wafer 1, and a nitride buffer layer 2 It is an aluminum nitride buffer layer. A gate dielectric layer 3 is grown on the upper surface of the aluminum nitride buffer layer. The gate dielectric layer 3 has a single-layer structure, wherein the gate dielectric layer 3 is an aluminum oxide dielectric layer.
[0045] Its preparation method is the same as Embodiment 1, so it will not be repeated here.
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